ADF4110BRUZ-RL7 Analog Devices Inc, ADF4110BRUZ-RL7 Datasheet - Page 21

• Manufacturer Part Number: ADF4110BRUZ-RL7
• Description: IC PLL FREQ SYNTHESIZER 16-TSSOP
• Manufacturer: Analog Devices Inc
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of ADF4110BRUZ-RL7

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 550MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 550MHz
• Pll Type: Frequency Synthesis
• Frequency: 550MHz
• Supply Current: 4.5mA
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: TSSOP
• No. Of Pins: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF411XEBZ1 - BOARD EVAL FOR ADF411X NO CHIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

RESYNCHRONIZING THE PRESCALER OUTPUT
Table 7 (the Reference Counter Latch Map) shows two bits,
DB22 and DB21, which are labeled DLY and SYNC, respectively.
These bits affect the operation of the prescaler.
With SYNC = 1, the prescaler output is resynchronized with the
RF input. This has the effect of reducing jitter due to the
prescaler and can lead to an overall improvement in synthesizer
phase noise performance. Typically, a 1 dB to 2 dB improvement
is seen in the ADF4113. The lower bandwidth devices can show
an even greater improvement. For example, the ADF4110 phase
noise is typically improved by 3 dB when SYNC is enabled.
With DLY = 1, the prescaler output is resynchronized with a
delayed version of the RF input.
Rev. C | Page 21 of 28
If the SYNC feature is used on the synthesizer, some care must
be taken. At some point, (at certain temperatures and output
frequencies), the delay through the prescaler coincides with the
active edge on RF input; this causes the SYNC feature to break
down. It is important to be aware of this when using the SYNC
feature. Adding a delay to the RF signal, by programming
DLY = 1, extends the operating frequency and temperature
somewhat. Using the SYNC feature also increases the value of
the AI
AI
an additional 0.3 mA if DLY is enabled.
All the typical performance plots in this data sheet, except for
Figure 8, apply for DLY and SYNC = 0, i.e., no resynchroniza-
tion or delay enabled.
DD
increases by about 1.3 mA when SYNC is enabled and by
ADF4110/ADF4111/ADF4112/ADF4113
DD
for the device. With a 900 MHz output, the ADF4113