CY2302SC-1 Cypress Semiconductor Corp, CY2302SC-1 Datasheet - Page 5

• Manufacturer Part Number: CY2302SC-1
• Description: IC CLK FREQ MULTI/ZDB 2OUT 8SOIC
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Distribution, Frequency Multiplier, Zero Delay Bufferr

Specifications of CY2302SC-1

• Number Of Circuits: 1
• Package / Case: 8-SOIC (3.9mm Width)
• Pll: Yes
• Input: LVCMOS, LVTTL
• Output: LVCMOS
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 133MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.3V, 5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Frequency-max: 133MHz
• Maximum Input Frequency: 133 MHz
• Minimum Input Frequency: 5 MHz
• Output Frequency Range: 10 MHz to 133 MHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V, 5 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AC Electrical Characteristics
T
AC Electrical Characteristics
T
Notes
Document #: 38-07154 Rev. *B
1. Input frequency is limited by output frequency range and input to output frequency multiplication factor (which is determined by circuit configuration).
2. Longer input rise and fall time degrades skew and jitter performance.
3. All AC specifications are measured with a 50Ω transmission line, load terminated with 50Ω to 1.4V.
4. Skew is measured at 1.4V on rising edges.
5. Duty cycle is measured at 1.4V.
6. 33 MHz reference input suddenly stopped (0 MHz). Number of cycles provided prior to output falling to <16 MHz.
7. Duty Cycle measured at 120 MHz. For 133 MHz, degrades to 35/65 worst case.
A
A
= 0°C to +70°C or –40° to 85°C, V
= 0°C to +70°C or –40° to 85°C, V
Parameter
Parameter
t
t
t
t
t
t
t
t
ICLKR
SKEW
f
ICLKR
ICLKF
SKEW
f
ICLKF
LOCK
LOCK
OUT
t
t
OUT
t
t
t
t
f
f
DC
t
t
DC
PD
t
t
t
PD
t
JC
JC
IN
IN
R
D
R
D
F
F
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Input Clock Rise Time
Input Clock Fall Time
Duty Cycle
PLL Lock Time
Jitter, Cycle-to-Cycle
Die Out Time
Output-output Skew
Propagation Delay
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Input Clock Rise Time
Input Clock Fall Time
Duty Cycle
PLL Lock Time
Jitter, Cycle-to-Cycle
Die out time
Output-output Skew
Propagation Delay
Description
Description
[6]
[6]
DD
DD
[1]
[1]
= 3.3V ±5%
= 5.0V ±10%
[4]
[4]
[4]
[4]
[2]
[2]
[2]
[2]
OUT1 15-pF load
OUT1 15-pF load
0.8V to 2.0V, 15-pF load
2.0V to 0.8V, 15-pF load
15-pF load
Power supply stable
OUT1, f
OUT2, f
0.8V to 2.0V, 15-pF load
2.0V to 0.8V, 15-pF load
15-pF load
Power supply stable
OUT1, f
OUT2, f
[3]
[3]
Test Condition
Test Condition
OUT
OUT
OUT
OUT
[5]
[5, 7]
>30 MHz
>30 MHz
>30 MHz
>30 MHz
–350
–350
Min
100
Min
100
10
40
10
40
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5
5
Typ
Typ
200
200
50
90
65
90
—
—
—
—
—
50
—
90
—
65
90
—
—
—
—
—
—
—
—
Max
Max
133
133
300
300
250
350
133
133
300
300
250
350
3.5
2.5
1.0
2.5
1.5
1.0
10
10
60
10
10
60
—
—
Cycles
cycles
CY2302
Clock
Clock
MHz
MHz
MHz
MHz
Unit
Unit
ms
ms
ns
ns
ns
ns
ps
ps
ps
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ns
ns
ns
ns
ps
ps
ps
ps
ps
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