CY2292FXC Cypress Semiconductor Corp, CY2292FXC Datasheet
CY2292FXC
Specifications of CY2292FXC
CY2292FXC
Related parts for CY2292FXC
CY2292FXC Summary of contents
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... MHz to 30 MHz (reference clock) Logic Block Diagram XTALIN XTALOUT SUSPEND / OE SHUTDOWN Cypress Semiconductor Corporation Document Number: 38-07449 Rev. *H Three PLL General Purpose EPROM Programmable Clock Generator Benefits Generates up to three custom frequencies from one external ■ source Easy customization and fast turnaround ■ ...
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Contents Pinouts .............................................................................. 3 Pin Definitions .................................................................. 3 Operation ........................................................................... 4 Output Configuration ....................................................... 4 Power Saving Features .................................................... 4 CyClocks Software ........................................................... 4 Cypress FTG Programmer ............................................... 4 Custom Configuration Request Procedure .................... 4 Maximum Ratings ............................................................. 5 Operating ...
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Pinouts Pin Definitions Pin Number Name CY2292 CLKC 1 Configurable clock output Voltage supply. DD GND 3, 11 Ground. [1] XTALIN 4 Reference crystal input or external reference clock input. [1, 2] XTALOUT 5 Reference crystal ...
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Operation The CY2292 is a third-generation family of clock generators. The CY2292 is upwardly compatible with the industry standard ICD2023 and ICD2028 and continues their tradition by providing a high level of customizable features to meet the diverse clock generation ...
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Maximum Ratings Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Supply voltage ..............................................–0 +7 input voltage ...........................................–0 +7.0 V Storage temperature ................................ –65 C to +150 ...
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Electrical Characteristics, Industrial 5.0 V Parameter Description V High level output voltage OH V Low level output voltage OL [13] V High level input voltage IH [13] V Low level input voltage IL I Input high current IH I Input ...
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Switching Characteristics, Commercial 5.0 V Parameter Name t Output period Clock output range operation [16] Output duty cycle Duty cycle for outputs, defined OUT Duty cycle for outputs, defined OUT t ...
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Switching Characteristics, Commercial 3.3 V Parameter Name t Output disable time Time for output to enter tristate mode after 5 SHUTDOWN/OE goes LOW t Output enable time Time for output to leave tristate mode after 6 SHUTDOWN/OE goes HIGH t ...
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Switching Characteristics, Industrial 5.0 V Parameter Name [29] t Peak-to-peak period jitter (16 MHz < f Clock jitter 9C [29] t Peak-to-peak period jitter (f Clock jitter 9D t Lock time for CPLL Lock time from power-up 10A t Lock ...
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Switching Waveforms Figure 2. All Outputs, Duty Cycle and Rise / Fall Time Output OE All Tristate Outputs CLK Output Related CLK Old Select Select CPU Note 30. The CY2292 has weak pull downs on all outputs. Hence, when a ...
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... V DD 0.1 0.1 F Ordering Information Ordering Code Pb-free CY2292FXC 16-pin SOIC CY2292FXCT 16-pin SOIC – Tape and Reel CY2292FXI 16-pin SOIC CY2292FXIT 16-pin SOIC – Tape and Reel CY2292FZX 16-pin TSSOP CY2292FZXT 16-pin TSSOP – Tape and Reel CY2292FZXI ...
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Ordering Code Definition (F) (C) (–xxx) CY 2292 (S) X (T) Package Characteristics Package 16-pin SOIC Document Number: 38-07449 Rev Tape and Reel; blank = Tube Custom configuration code (factory programmed device only) Temperature ...
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Package Diagrams Figure 7. 16-Pin TSSOP 4.40 mm Body Z16.173 Document Number: 38-07449 Rev. *H Figure 6. 16-Pin (150-Mil) SOIC S16.15 CY2292 51-85068 *C 51-85091 *C Page [+] Feedback ...
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Acronyms Acronym Description CPU central processing unit CMOS complementary metal oxide semiconductor DC direct current EPROM erasable programmable read only memory FAE field application engineer FTG frequency Timing Group OE output enable OSC oscillator PD power down PLL phase locked ...
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Document History Page Document Title: CY2292 Three PLL General Purpose EPROM Programmable Clock Generator Document Number: 38-07449 Orig. of Submission Revision ECN Change ** 116993 DSG *A 119639 CKN *B 277130 RGL *C 395808 RGL *D 2565316 AESA/KVM *E 2761988 ...
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... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...