CY22150FZXC Cypress Semiconductor Corp, CY22150FZXC Datasheet - Page 4

• Manufacturer Part Number: CY22150FZXC
• Description: IC CLOCK GEN PROG 16-TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Clock Generator, Fanout Distributionr

Specifications of CY22150FZXC

• Number Of Circuits: 1
• Package / Case: 16-TSSOP
• Pll: Yes
• Input: Crystal
• Output: Clock
• Ratio - Input:output: 1:6
• Differential - Input:output: No/No
• Frequency - Max: 200MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Frequency-max: 200MHz
• Maximum Input Frequency: 133 MHz
• Minimum Input Frequency: 1 MHz
• Output Frequency Range: 80 KHz to 200 MHz
• Supply Voltage (max): 7 V
• Supply Voltage (min): - 0.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Number Of Elements: 1
• Supply Current: 45mA
• Pll Input Freq (min): 1MHz
• Pll Input Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY30700 - KIT PROG FOR CY22150428-1918 - KIT DEV FTG PROGRAMMING KIT428-1452 - SOCKET ADAPTER FOR CY22050
• Lead Free Status / Rohs Status: Compliant
• Other names: 428-2176-5; CY22150FZXC

Default Startup Condition for the CY22150
The default (programmed) condition of the device is generally set
by the distributor who programs the device using a customer
specific JEDEC file produced by CyClocksRT™. Parts shipped
from the factory are blank and unprogrammed. In this condition,
all bits are set to 0, all outputs are three-stated, and the crystal
oscillator circuit is active.
While you can develop your own subroutine to program any or
all of the individual registers described in the following pages, it
may be easier to use CyClocksRT to produce the required
register setting file.
The serial interface address of the CY22150 is 69H. If there is a
conflict with any other devices in your system, then this can also
be changed using CyClocksRT.
Frequency Calculations and Register Defini-
tions using the Serial Programming Interface
The CY22150 provides an industry standard serial interface for
volatile, in-system programming of unique frequencies and
options. Serial programming and reprogramming allows for quick
design changes and product enhancements, eliminates
inventory of old design parts, and simplifies manufacturing.
The Serial Programming Interface (SPI) provides volatile
programming. This means when the target system is powered
down, the CY22150 reverts to its pre-SPI state, as defined above
(programmed or unprogrammed). When the system is powered
back up again, the SPI registers must be reconfigured again.
All programmable registers in the CY22150 are addressed with
eight bits and contain eight bits of data. The CY22150 is a slave
device with an address of 1101001 (69H).
Table 2. Summary Table – CY22150 Programmable Registers
Document #: 38-07104 Rev. *I
Register
OCH
09H
12H
13H
40H
41H
42H
44H
45H
46H
47H
CLKOE control
DIV1SRC mux and
DIV1N divider
Input crystal oscillator
drive control
Input load capacitor
control
Charge pump and PB
counter
PO counter, Q counter
Crosspoint switch
matrix control
DIV2SRC mux and
DIV2N divider
Description
CLKSRC2
CLKSRC0
CLKSRC1
for LCLK1
for LCLK3
DIV1SRC
DIV2SRC
CapLoad
for CLK6
PB(7)
PO
D7
(7)
0
0
1
CLKSRC1
CLKSRC2
CLKSRC0
for LCLK1
for LCLK4
DIV1N(6)
DIV2N(6)
CapLoad
for CLK6
PB(6)
Q(6)
D6
(6)
0
0
1
CLKSRC0
CLKSRC1
for LCLK1
for LCLK4
DIV1N(5)
DIV2N(5)
CapLoad
PB(5)
CLK6
Q(5)
D5
(5)
1
0
1
Table 2
register definitions and their allowable values are listed below.
Reference Frequency
The REF can be a crystal or a driven frequency. For crystals, the
frequency range must be between 8 MHz and 30 MHz. For a
driven frequency, the frequency range must be between 1 MHz
and 133 MHz.
Using a Crystal as the Reference Input
The input crystal oscillator of the CY22150 is an important
feature because of the flexibility it allows the user in selecting a
crystal as a REF source. The input oscillator has programmable
gain, allowing maximum compatibility with a reference crystal,
regardless of manufacturer, process, performance, and quality.
Programmable Crystal Input Oscillator Gain Settings
The Input crystal oscillator gain (XDRV) is controlled by two bits
in register 12H and are set according to
parameters controlling the gain are the crystal frequency, the
internal crystal parasitic resistance (ESR, available from the
manufacturer), and the CapLoad setting during crystal startup.
Bits 3 and 4 of register 12H control the input crystal oscillator gain
setting. Bit 4 is the MSB of the setting, and bit 3 is the LSB. The
setting is programmed according to
bits in the register are reserved and should be programmed as
shown in
Using an External Clock as the Reference Input
The CY22150 also accepts an external clock as reference, with
speeds up to 133 MHz. With an external clock, the XDRV
(register 12H) bits must be set according to
CLKSRC2
CLKSRC0
for LCLK2
for LCLK4
DIV1N(4)
DIV2N(4)
CapLoad
XDRV(1)
Pump(2)
CLK5
PB(4)
Q(4)
D4
(4)
lists the SPI registers and their definitions. Specific
1
Table 4
CLKSRC1
for LCLK2
CLKSRC2
DIV1N(3)
DIV2N(3)
XDRV(0)
CapLoad
for CLK5
Pump(1)
on page 5.
LCLK4
PB(3)
Q(3)
D3
(3)
1
CLKSRC0
CLKSRC1
for LCLK2
DIV1N(2)
DIV2N(2)
CapLoad
Pump(0)
for CLK5
LCLK3
PB(2)
Q(2)
D2
(2)
0
1
Table 3
Table 3
CLKSRC2
CLKSRC0
for LCLK3
DIV1N(1)
DIV2N(1)
CapLoad
for CLK5
LCLK2
PB(9)
PB(1)
Q(1)
Table 5
on page 5. All other
D1
(1)
0
1
on page 5. The
CY22150
Page 4 of 16
on page 5.
CLKSRC1
CLKSRC2
for LCLK3
DIV1N(0)
CapLoad
DIV2N(0)
for CLK6
LCLK1
PB(8)
PB(0)
Q(0)
D0
(0)
0
1
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