CY2305SXC-1 Cypress Semiconductor Corp, CY2305SXC-1 Datasheet - Page 6

IC CLK ZDB 5OUT 133MHZ 8SOIC

CY2305SXC-1

Manufacturer Part Number
CY2305SXC-1
Description
IC CLK ZDB 5OUT 133MHZ 8SOIC
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Distribution, Zero Delay Bufferr
Datasheet

Specifications of CY2305SXC-1

Number Of Circuits
1
Package / Case
8-SOIC (3.9mm Width)
Pll
Yes
Input
LVCMOS, LVTTL
Output
LVCMOS
Ratio - Input:output
1:5
Differential - Input:output
No/No
Frequency - Max
133.33MHz
Divider/multiplier
No/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Frequency-max
133MHz
Output Frequency Range
10 MHz to 133.33 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Number Of Elements
1
Supply Current
32mA
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
SOIC
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-1766-5
CY2305SXC-1

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Switching Characteristics for CY2305SC-1 and CY2309SC-1 Commercial Temperature
Devices
Switching Characteristics for CY2305SC-1H and CY2309SC-1H Commercial Temperature
Devices
Operating Conditions for CY2305SI-XX and CY2309SI-XX Industrial Temperature Devices
Document Number : 38-07140 Rev. *M
Notes
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
V
T
C
C
C
6B
7
J
LOCK
1
DC
DC
3
4
5
6A
6B
7
8
J
LOCK
8. Parameter is guaranteed by design and characterization. Not 100% tested in production.
9. All parameters specified with loaded outputs.
Parameter
Parameter
A
DD
L
L
IN
Parameter
[9]
[9]
Supply voltage
Operating temperature (ambient temperature)
Load capacitance, below 100 MHz
Load capacitance, from 100 MHz to 133 MHz
Input capacitance
Output frequency
Duty cycle
Duty cycle
Rise time
Fall time
Output-to-output skew
Delay, REF rising edge to
CLKOUT rising edge
Delay, REF rising edge to
CLKOUT rising edge
Device-to-device skew
Output slew rate
Cycle-to-cycle jitter
PLL lock time
Delay, REF rising edge to
CLKOUT rising edge
Device-to-device skew
Cycle-to-cycle jitter
PLL lock time
[8]
[8]
[8]
[8]
Name
= t
= t
[8]
Name
[8]
2
2
[8]
÷ t
÷ t
[8]
[8]
1
1
[8]
[8]
[8]
[8]
[8]
[8]
Description
30 pF load
10 pF load
Measured at 1.4 V, F
Measured at 1.4 V, F
Measured between 0.8 V and 2.0 V
Measured between 0.8 V and 2.0 V
All outputs equally loaded
Measured at V
Measured at V
PLL Bypass Mode, CY2309 device
only.
Measured at V
pins of devices
Measured between 0.8 V and 2.0 V
using Test Circuit #2
Measured at 66.67 MHz, loaded
outputs
Stable power supply, valid clock
presented on REF pin
Measured at V
PLL Bypass Mode, CY2309 device
only.
Measured at V
CLKOUT pins of devices
Measured at 66.67 MHz, loaded
outputs
Stable power supply, valid clock
presented on REF pin
Test Conditions
Description
DD
DD
DD
DD
DD
/2 on the CLKOUT
/2
/2. Measured in
/2. Measured in
/2 on the
out
out
= 66.67 MHz
< 50 MHz
Min
40.0
45.0
Min
Min
–40
1
3.0
10
10
1
1
Typ.
70
Typ.
50.0
50.0
5
85
60
5
Max
3.6
85
30
10
CY2305, CY2309
7
133.33
Max
700
200
±350
8.7
1.0
Max
60.0
55.0
1.50
1.50
100
250
700
200
8.7
1.0
Page 6 of 19
Unit
°C
pF
pF
pF
Unit
MHz
MHz
V/ns
V
Unit
ms
ms
ns
ps
ps
ns
ns
ps
ps
ns
ps
ps
%
%
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