ADF4001BRUZ Analog Devices Inc, ADF4001BRUZ Datasheet - Page 2

• Manufacturer Part Number: ADF4001BRUZ
• Description: IC CLOCK GEN PLL 16-TSSOP
• Manufacturer: Analog Devices Inc
• Type: Clock Generator (RF)r

Specifications of ADF4001BRUZ

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 200MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 200MHz
• Pll Type: Clock Generation
• Frequency: 200MHz
• Supply Current: 4.5mA
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: TSSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF4001EBZ2 - BOARD EVAL FOR ADF4001
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

CPGND = 0 V; R
Parameter
RF CHARACTERISTICS (3 V)
RF CHARACTERISTICS (5 V)
REF
PHASE DETECTOR
CHARGE PUMP
LOGIC INPUTS
LOGIC OUTPUTS
POWER SUPPLIES
NOISE CHARACTERISTICS
NOTES
1
2
3
4
5
6
7
Specifications subject to change without notice.
ADF4001–SPECIFICATIONS
Operating temperature range (B Version) is –40°C to +85°C.
AV
Guaranteed by design. Sample tested to ensure compliance.
T
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 logN (where N is the N divider value).
The phase noise is measured with the EVAL-ADF4001EB1 evaluation board and the HP8562E spectrum analyzer.
f
REF IN
A
RF Input Frequency
RF Input Sensitivity
RF Input Frequency
REF
REF
REF
REF
Phase Detector Frequency
I
I
Sink and Source Current Matching
I
I
V
V
I
C
V
V
AV
DV
V
I
ADF4001
ADF4001 Phase Noise Floor
Phase Noise Performance
Spurious Signals
DD
CP
CP
CP
CP
INH
DD
= 25°C; AV
INH
INL
OH
OL
P
IN
IN
High Value
Low Value
Absolute Accuracy
R
I
Low Power Sleep Mode
200 MHz Output
200 MHz Output
P
= DV
= 10 MHz; f
DD
4
DD
Sink/Source
Three-State Leakage Current
vs. V
vs. Temperature
, Input Capacitance
SET
, Output Low Voltage
/I
, Output High Voltage
, Input Low Voltage
IN
IN
IN
IN
, Input High Voltage
CHARACTERISTICS
(AI
INL
Input Frequency
Input Sensitivity
Input Capacitance
Input Current
DD
Range
DD
, Input Current
CP
= 3 V; for AV
DD
+ DI
SET
= DV
PFD
= 4.7 k ; T
= 200 kHz; Offset Frequency = 1 kHz; f
DD
DD
= 3 V; RF
)
7
7
DD
= DV
2
6
A
3
IN
DD
= T
= 100 MHz.
5
= 5 V, use CMOS compatible levels.
MIN
to T
MAX
, unless otherwise noted; dBm referred to 50
5.5
B Version
5/165
–10/0
10/200
20/200
5/104
–5
10
± 100
55
5
625
2.5
2.7/10
1
2
1.5
2
0.8 × DV
0.2 × DV
± 1
10
DV
0.4
2.7/5.5
AV
AV
0.4
1
–161
–153
–99
–90/–95
DD
DD
DD
RF
/6.0
– 0.4
= 200 MHz; N = 1000; Loop B/W = 20 kHz.
DD
DD
1
(AV
MHz min/max
mA max
dBc typ/dBc typ
Unit
MHz min/max
dBm min/max
MHz min/max
MHz min/max
dBm min
pF max
µA max
MHz max
mA typ
µA typ
% typ
kΩ typ
nA typ
% typ
% typ
% typ
V min
V max
µA max
pF max
V min
V max
V min/V max
V min/V max
mA max
µA typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
DD
= DV
–2–
DD
= 3 V
10%, 5 V
Test Conditions/Comments
–5/0 dBm min/max
–10/0 dBm min/max
See Figure 2 for Input Circuit
For f < 5 MHz, Use DC-Coupled Square Wave
(0 to V
AC-Coupled. When DC-Coupled:
0 to V
Programmable: See Table V
With R
With R
See Table V
0.5 V ≤ V
0.5 V ≤ V
V
I
I
AV
4.5 mA typical
T
@ 200 kHz PFD Frequency
@ 1 MHz PFD Frequency
@ VCXO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
See Figure 3 for Input Circuit
OH
OL
CP
A
DD
= 25°C
.)
= 500 µA
= 500 µA
= V
10%; AV
DD
≤ V
DD
SET
SET
P
/2
Max (CMOS Compatible)
CP
CP
)
P
= 4.7 kΩ
= 4.7 kΩ
≤ 6.0 V
≤ V
≤ V
DD
P
P
≤ V
– 0.5
– 0.5
P
≤ 6.0 V ; AGND = DGND =
REV. A