NB100LVEP222FAR2 ON Semiconductor, NB100LVEP222FAR2 Datasheet - Page 8

• Manufacturer Part Number: NB100LVEP222FAR2
• Description: IC DRVR CLK ECL/PECL 1:15 52LQFP
• Manufacturer: ON Semiconductor
• Series: 100LVEPr
• Type: Fanout Buffer (Distribution), Divider, Multiplexerr

Specifications of NB100LVEP222FAR2

• Number Of Circuits: 1
• Ratio - Input:output: 1:15
• Differential - Input:output: Yes/Yes
• Input: LVECL, LVPECL
• Output: LVECL, LVPECL
• Frequency - Max: 1GHz
• Voltage - Supply: ±2.375 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-LSQFP Exposed Pad
• Frequency-max: 1GHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: NB100LVEP222FOSCT

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
14. Measured with LVPECL 750 mV source, 50% duty cycle clock source. All outputs loaded with 50 W to V
15. Skew is measured between outputs under identical transitions and operating conditions.
16. Device−to−Device skew for identical transitions at identical V
17. V
Table 8. AC CHARACTERISTICS
(Note 14)
Symbol
V
t
t
t
t
t
t
V
DCO
t
PLH
PHL
skew
skew
skew
JITTER
r
/t
Opp
PP
f
PP
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
is the differential configuration input voltage swing required to maintain AC characteristics including t
Differential Output Voltage
(Figure 5)
Propagation Delay (Differential Configuration)
Within−Device Skew (Note 15)
(÷1 Mode)
Within−Device Skew (Note 15)
(÷2 Mode)
Device−to−Device Skew (Differential
Configuration) (Note 16)
Random Clock Jitter (Figure 5) (RMS)
Input Swing (Differential Configuration)
(Note 17) (Figure 6)
Output Duty Cycle
Output Rise/Fall Time 20%−80%
Characteristic
V
− Qa
− Qa
CC
f
f
f
out
out
out
− All Outputs
− All Outputs
= V
N
N
, Qb
, Qb
= 0.8 GHz
= 1.0 GHz
= 50 MHz
CLKx−Q
− Qa[0:1]
− Qb[0:2]
− Qd[0:5]
− Qa[0:1]
− Qb[0:2]
− Qd[0:5]
CC0
− Qc[0:3]
− Qc[0:3]
MR−Q
N
N
, Qd
, Qd
= 2.375 to 3.8 V; V
XX
N
N
X
http://onsemi.com
49.5
Min
500
550
500
650
700
150
100
CC
/V
−40°C
8
CC0
Typ
600
650
650
800
900
800
200
10
10
20
10
10
20
15
15
20
15
15
20
85
50
1
EE
levels.
= 0.0 V or V
1200
1200
Max
50.5
900
300
300
40
40
60
40
40
60
70
70
70
70
70
70
5
49.5
Min
500
525
425
700
700
150
100
CC
= V
25°C
Typ
600
650
650
875
900
800
200
10
10
20
10
10
20
10
10
20
10
10
20
85
50
CC0
1
= 0.0 V; V
1000
1200
1200
Max
50.5
300
300
40
40
60
40
40
60
40
40
50
40
40
50
4
CC
PD
EE
49.5
Min
/V
500
500
400
850
700
150
150
and device−to−device skew.
= −2.375 to −3.8 V
CC0
− 2.0 V.
85°C
Typ
600
650
600
975
900
800
250
10
10
20
10
10
20
15
10
15
15
15
15
85
50
1
1150
1200
1200
Max
50.5
300
350
40
40
60
40
40
60
70
40
70
70
70
70
5
Unit
mV
mV
ps
ps
ps
ps
ps
ps
%