MPC9449AE Freescale Semiconductor, MPC9449AE Datasheet - Page 8

• Manufacturer Part Number: MPC9449AE
• Description: IC CLOCK FANOUT BUFF 1:15 52LQFP
• Manufacturer: Freescale Semiconductor
• Type: Fanout Buffer (Distribution), Divider, Multiplexerr

Specifications of MPC9449AE

• Number Of Circuits: 1
• Ratio - Input:output: 3:15
• Differential - Input:output: Yes/No
• Input: LVCMOS, LVPECL
• Output: LVCMOS
• Frequency - Max: 200MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-LQFP
• Frequency-max: 200MHz
• Supply Voltage Max: 2.5V
• Package/case: 52-LQFP
• Leaded Process Compatible: Yes
• Logic Type: LVPECL Or LVCMOS
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3.3V
• Rohs Compliant: Yes
• Operating Temperature Range: -40°C To +85°C
• No. Of Multipliers / Dividers: 2
• Frequency: 200MHz
• Digital Ic Case Style: TQFP
• Supply Current: 10mA
• Clock Ic Type: Clock Buffer
• No. Of Outputs: 15
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MPC9449
MOTOROLA
PCLK
PCLK
Figure 12. Output Transition Time Test Reference
Q X
Figure 10. Propagation delay (t PD ) test reference
The pin–to–pin skew is defined as the worst case difference in prop-
agation delay between any similar delay path within a single device
t F
Figure 8. Output–to–output Skew t SK(O)
t (LH)
V PP
t SK(O)
t (HL)
t R
V CC =3.3V
0.55
2.4
V CC =2.5V
1.8V
0.6V
V CC
V CC
GND
V CC
V CC
GND
V CMR
V CC
V CC
GND
B
B
B
2
2
2
8
Figure 11. Output Pulse Skew t SK(P) test reference
CCLK
CCLK
The variation in cycle time of a signal between adjacent cycles, over a
random sample of adjacent cycle pairs
Q X
Q X
Figure 9. Propagation delay (t PD ) test reference
Figure 13. Cycle–to–cycle Jitter
t (LH)
T N
t (LH)
t SK(P) = | t PLH – t PHL |
T N+1
t (HL)
t (HL)
T JIT(CC) = |T N –T N+1 |
V CC
V CC
GND
V CC
V CC
GND
V CC
V CC
GND
V CC
V CC
GND
B
B
B
B
2
2
2
2