MPC9448FA Freescale Semiconductor, MPC9448FA Datasheet - Page 5

• Manufacturer Part Number: MPC9448FA
• Description: IC CLOCK FAN BUFF LV 1:12 32LQFP
• Manufacturer: Freescale Semiconductor
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of MPC9448FA

• Number Of Circuits: 1
• Ratio - Input:output: 2:12
• Differential - Input:output: Yes/No
• Input: LVCMOS, LVPECL
• Output: LVCMOS
• Frequency - Max: 350MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 350MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

a. AC characteristics apply for parallel output termination of 50 to V TT .
b. V CMR (AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the V CMR range
c. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input
d. Output pulse skew is the absolute difference of the propagation delay times: | t pLH - t pHL |.
TIMING SOLUTIONS
Table 8. AC CHARACTERISTICS (V CC = 2.5V 5%, T A = –40 C to +85 C) a
t PLZ, HZ
t PZL, LZ
t PLH/HL
t PLH/HL
Symbol
V CMR b
t P, REF
t sk(PP)
t sk(O)
t SK(p)
and the input swing lies within the V PP (AC) specification. Violation of V CMR or V PP impacts t PLH/HL and t SK(PP) .
pulse width, output duty cycle and maximum frequency specifications.
f MAX
DC Q
V PP
t r , t f
t r , t f
f ref
t S
t H
Input Frequency
Maximum Output Frequency
Peak-to-peak input voltage
Common Mode Range
Reference Input Pulse Width
CCLK Input Rise/Fall Time
Propagation delay
Output Disable Time
Output Enable Time
Setup time
Hold time
Output-to-output Skew
Device-to-device Skew
Output pulse skew d
Output Duty Cycle
Output Rise/Fall Time
Characteristics
f Q < 350 MHz and using CCLK
f Q <200 MHz and using PCLK
PCLK or CCLK to any Q
CCLK to CLK_STOP
CCLK to CLK_STOP
PCLK to CLK_STOP
PCLK to CLK_STOP
CCLK to any Q
PCLK to any Q
Using CCLK
Using PCLK
PCLK
PCLK
5
Min
400
1.2
1.4
1.5
1.7
0.0
0.0
1.0
1.5
0.1
45
45
0
0
Typ
50
50
V CC -0.8
1000
Max
1.0 c
350
350
150
200
300
4.2
4.4
2.7
1.0
11
11
55
55
Unit
MHz
MHz
mV
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ns
ps
ps
ns
%
%
V
LVPECL
LVPECL
0.8 to 2.0V
DC REF = 50%
0.6 to 1.8V
MPC9448
Condition
MOTOROLA