CY2DP818ZXI-2 Cypress Semiconductor Corp, CY2DP818ZXI-2 Datasheet
CY2DP818ZXI-2
Specifications of CY2DP818ZXI-2
Related parts for CY2DP818ZXI-2
CY2DP818ZXI-2 Summary of contents
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... Does not exceed Bellcore 802.3 standards ■ Operation up to 350 MHz and 700 Mbps ■ Logic Block Diagram Cypress Semiconductor Corporation Document #: 38-07588 Rev. *A PRELIMINARY Description This Cypress series of network circuits is produced using advanced 0.35 micron CMOS technology, achieving the industry’ ...
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Pin Configuration Pin Description Pin Number Pin Name 1, 9,12,18,19,20,38 GND 2,8,13,29,17 VDD 3,4,5,6,14,15,16 EN(1:7) 10,11 Input A, Input B 37, 36,35,34, Q1(A,B), Q2(A,B) 33,32,31, 30, Q3(A,B), Q4(A,B) 28,27,26,25, Q5(A,B), Q6(A,B) 24,23,22,21 Q7(A,B), Q8(A,B) 7 InConfig Document #: 38-07588 Rev. ...
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Power Supply Characteristics Parameter Description ICCD Dynamic Power Supply Current IC Total Power Supply Current IC Core Core Current when Output Loads are Disabled Input Receiver Configuration for Differential or LVTTL/LVCMOS INCONFIG Pin 7 Input Receiver Family Binary Value 1 ...
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Absolute Maximum Conditions Parameter Description V DC Supply Voltage Operating Voltage Input Voltage Output Voltage OUT V Output Termination Voltage TT T Temperature, Storage S T Temperature, Operating A Ambient Multiple ...
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LVPECL Output 3.3V ± 5 Parameter Description V Driver Differential Output Voltage p-p OD ΔV Driver common-Mode Variation p-p OC Rise Time Differential 20% to 80% Fall Time V Output High Voltage OH ...
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Figure 3. Differential Receiver to Driver Propagation Delay and Driver Transition Time A Pulse Generator B INA 1 INB QXA 1 QXB Figure 4. Test Circuit and Voltage Definitions for the Driver Common-Mode Output Voltage Pulse ...
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... Figure 6. LVTTL/LVCMOS INPUT A LVCM OS / LVTTL INPUT B GND InConfig LVTTL/LVCMOS 1 Ordering Information Part Number CY2DP818ZI-2 CY2DP818ZI-2T CY2DP818ZC-2 CY2DP818ZC-2T Pb Free Devices CY2DP818ZXI-2 CY2DP818ZXI-2T CY2DP818ZXC-2 CY2DP818ZXC-2T Note 6. LVPECL or LVDS differential input value. Document #: 38-07588 Rev. *A PRELIMINARY 150 10pF GND 150 Standard Termination 1.4V 1.0V 0.0V tF Figure 7. LVDS/LVPECL & ...
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Package Drawing and Dimensions Document #: 38-07588 Rev. *A PRELIMINARY Figure 8. 38-Pin TSSOP (4.40 mm Body) Z38 CY2DP818-2 51-85151-*A Page [+] Feedback [+] Feedback [+] Feedback ...
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... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...