SY89826LHI Micrel Inc, SY89826LHI Datasheet - Page 9

• Manufacturer Part Number: SY89826LHI
• Description: IC BUFFER LVDS 3.3V 1:22 64-TQFP
• Manufacturer: Micrel Inc
• Series: Precision Edge®r
• Type: Fanout Buffer (Distribution), Multiplexer , Translatorr

Specifications of SY89826LHI

• Number Of Circuits: 1
• Ratio - Input:output: 2:22
• Differential - Input:output: Yes/Yes
• Input: LVDS, LVPECL
• Output: LVDS
• Frequency - Max: 1GHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
• Frequency-max: 1GHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Micrel, Inc.
either an LVPECL or LVDS input, selectable by an input
mux, and outputs 22 LVDS output pairs. The device features
a synchronous output enable. The SY89826L provides
extremely low skew across its outputs.
LVPECL_CLK
voltage swing. This input may be adjusted per the data
sheet characteristics regarding the CMR and minimum input
swing. As the SY89826L contains no appropriate internal
termination, upstream devices need to be properly
terminated to provide the proper LVPECL input swing. If
not being used (CLK_SEL is LOW), this input pair may be
left floating, as it is internally terminated to ground via a
75k pull-down resistor.
LVDS_CLK
voltage swing. The SY89826L provides an appropriate
internal 100
devices do not require external termination to drive the
SY89826L. If not being used (CLK_SEL is HIGH), this input
pair may be left floating.
M9999-011907
[e-mail] or [phone]
Part Number
SY55855V
SY89825U
SY89828L
SY89829U
M-0317
Exposed Pad
DETAILED DESCRIPTION
RELATED PRODUCT AND SUPPORT DOCUMENTATION
The SY89826L is a precision 1:22 fanout buffer. It accepts
The SY89826L allows one input with standard LVPECL
The SY89826L allows one input with standard LVDS
termination resistor. Hence, upstream LVDS
Function
Dual CML/PECL/LVPECL-to-LVDS
Translator
2.5/3.3V 1:22 High-performance,
Low-voltage PECL Bus Clock Driver
& Translator w/ Internal Termination
3.3V 1GHz Dual 1:10 Precision
LVDS Fanout Buffer with 2:1 Input Mux
2.5/3.3V High-performance, Dual 1:10
LVPECL Clock Driver w/ Internal Termination &
Redundant Switchover
HBW Solutions
Amkor Exposed Pad Application Note
9
CLK_SEL Input
LVDS_CLK (CLK_SEL is LOW) or LVPECL_CLK (CLK_SEL
is LOW),.
OE
disable the outputs only when the outputs are LOW. This
avoids the possibility of generating runt pulses. The OE
input is an asynchronous input, but operates as a
synchronous enable. For synchronous operation, please
adhere to the specific setup and hold times. When disabled,
the Q outputs are LOW and the /Q outputs are HIGH.
LVDS Outputs
around a 1.25V common mode voltage above ground. The
common mode voltage has tight limits to permit large
variations in ground between an LVDS driver and receiver.
Also, change in common mode voltage, as a function of
data input is kept tight to keep EMI low.
terminated with a 100
unused output pairs. This ensures the best jitter and skew
performance of the device.
The CLK_SEL TTL Input is used to select either
The SY89826L's output enable function is designed to
The SY89826L's LVDS outputs swing typically 350mV
Each of the SY89826L's LVDS outputs should be
Data Sheet Link
www.micrel.com/product-info/products/sy55855v.shtml
www.micrel.com/product-info/products/sy89825u.shtml
www.micrel.com/product-info/products/sy89828l.shtml
www.micrel.com/product-info/products/sy89829u.shtml
www.micrel.com/product-info/as/solutions.shtml
www.amkor.com/products/notes_papers/epad.pdf
termination resistor including any
Precision Edge
SY89826L
®