MC100LVEL37DWG ON Semiconductor, MC100LVEL37DWG Datasheet - Page 5
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MC100LVEL37DWG
Manufacturer Part Number
MC100LVEL37DWG
Description
IC BUFFER FANOUT ECL 1:4 20SOIC
Manufacturer
ON Semiconductor
Series
100LVELr
Type
Fanout Buffer (Distribution), Divider, Multiplexerr
Datasheet
1.MC100LVEL37DWR2G.pdf
(6 pages)
Specifications of MC100LVEL37DWG
Number Of Circuits
1
Ratio - Input:output
2:4
Differential - Input:output
Yes/Yes
Input
ECL
Output
ECL
Frequency - Max
1GHz
Voltage - Supply
3 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Frequency-max
1GHz
Output Logic Level
ECL
Supply Voltage (max)
+/- 3.8 V
Supply Voltage (min)
+/- 3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Multiply / Divide Factor
2:1
Number Of Clock Inputs
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC100LVEL37DWGOS
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
ORDERING INFORMATION
Specifications Brochure, BRD8011/D.
MC100LVEL37DW
MC100LVEL37DWG
MC100LVEL37DWR2
MC100LVEL37DWR2G
Device
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
SO−20 WB
SO−20 WB
SO−20 WB
SO−20 WB
(Pb−Free)
(Pb−Free)
Package
− ECL Clock Distribution Techniques
− Designing with PECL (ECL at +5.0 V)
− ECLinPSt I/O SPiCE Modeling Kit
− Metastability and the ECLinPS Family
− Interfacing Between LVDS and ECL
− The ECL Translator Guide
http://onsemi.com
5
1000 / Tape & Reel
1000 / Tape & Reel
38 Units / Rail
38 Units / Rail
Shipping
†