CY2CC810OXI Cypress Semiconductor Corp, CY2CC810OXI Datasheet

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CY2CC810OXI

Manufacturer Part Number
CY2CC810OXI
Description
IC CLK FANOUT BUFFER 1:10 20SSOP
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of CY2CC810OXI

Package / Case
20-SSOP
Number Of Circuits
1
Ratio - Input:output
1:10
Differential - Input:output
No/No
Input
LVCMOS
Output
AVCMOS
Frequency - Max
650MHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
650MHz
Number Of Outputs
10
Max Input Freq
650 MHz
Propagation Delay (max)
3.5 ns @ 3.3V
Supply Voltage (max)
3.465 V
Supply Voltage (min)
2.375 V
Maximum Power Dissipation
750 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2900-5
CY2CC810OXI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2CC810OXI
Manufacturer:
STM
Quantity:
1 921
Part Number:
CY2CC810OXI-1
Manufacturer:
Cypress
Quantity:
789
Features
Cypress Semiconductor Corporation
Document #: 38-07056 Rev. *G
Low-voltage operation
V
1:10 fanout
Over voltage tolerant input hot swappable
Drives either a 50-Ohm or 75-Ohm transmission line
Low-input capacitance
250 ps typical output-to-output skew
19 ps typical DJ jitter
Typical propagation delay < 3.5 ns
High-speed operation > 500 MHz
Industrial temperature range
Available packages include: SSOP
Block Diagram
DD
range from 2.5V to 3.3V
IN
INPUT
VD D
G N D
198 Champion Court
(AVCMOS)
OUTPUT
Q 1
Q 2
Q 3
Q 4
Q 5
Q 6
Q 7
Q 8
Q 10
Q 9
Description
The Cypress series of network circuits are produced using
advanced 0.35-micron CMOS technology, achieving the
industry’s fastest logic and buffers.
The Cypress CY2CC810 fanout buffer features one input and ten
outputs. Designed for data communications clock management
applications, the large fanout from a single input reduces loading
on the input clock.
AVCMOS-type
impedance matching and reduce noise overall.
.
Pin Configuration
San Jose
GND
GND
VDD
VDD
GND
Q1
Q2
Q4
IN
Q3
outputs
1:10 Clock Fanout Buffer
20 pin SOIC/SSOP
,
1
2
3
4
5
6
7
8
9
10
CA 95134-1709
dynamically
20
19
18
17
16
15
14
13
12
11
Revised October 08, 2010
VDD
Q10
Q9
GND
Q8
VDD
Q7
Q5
GND
Q6
adjust
CY2CC810
408-943-2600
for
variable
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CY2CC810OXI Summary of contents

Page 1

... Block Diagram INPUT Cypress Semiconductor Corporation Document #: 38-07056 Rev. *G Description The Cypress series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic and buffers. The Cypress CY2CC810 fanout buffer features one input and ten outputs ...

Page 2

Pin Description Pin Number 10 11, 12, 14, 16, 18, 19 Absolute Maximum Conditions Parameter V V Ground Supply voltage Input Supply Voltage to ...

Page 3

Capacitance Parameter Description Cin Input Capacitance Cout Output Capacitance Power Supply Characteristics Parameter Description Δ Delta I Quiescent Power ICC CC Supply Current I Dynamic Power Supply CCD Current I Total Power Supply Current Power-up time for ...

Page 4

AC Switching Characteristics Parameter t Propagation Delay – Low to High PLH t Propagation Delay – High to Low PHL t Output Rise Time R t Output Fall Time F t Output Skew: Skew between outputs of the same package ...

Page 5

Figure 4. Voltage WaveformsPropagation Delay Times Output Document #: 38-07056 Rev. *G Figure 3. Point to Point Load Circuit ...

Page 6

Parameter Measurement Information: V Figure 6. Voltage Waveforms–Pulse Duration Figure 8. Voltage Waveforms Propagation Delay Times Document #: 38-07056 Rev 3.3V DD [3,4,5] Figure 5. Load Circuit From Output Under Test 500 ohm L ...

Page 7

INPUT OUTPUT PACKAGE 1 OUTPUT PACKAGE 2 OUTPUT Document #: 38-07056 Rev. *G Figure 9. Pulse Skew–tsk ( PHL PLH ...

Page 8

... Ordering Information [7] Part Number Pb-free CY2CC810OXI CY2CC810OXIT CY2CC810OXI-1 CY2CC810OXI-1T Package Drawing and Dimensions Figure 12. 20-Pin (5.3-mm) Shrunk Small Outline Package O20 10 7.50 8.10 11 SEATING PLANE 2.00 MAX 0.10 0.05 0.21 Note 7. Devices with part numbers ending with -1 are identical to devices without the -1 suffix. There are no differences in specification. ...

Page 9

... RGL Added tpu parameter in the Power Supply Characteristics table CXQ Updated package diagram Removed obsolete parts from ordering information table and added CY2CC810OXI-1, CY2CC810OXI-1T Removed reference to SOIC packages CXQ Removed CY2CC810OXC and CY2CC810OXCT parts from CY2CC810 in the DC Electrical Characteristics @3.3V table. ...

Page 10

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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