SI5367A-C-GQ Silicon Laboratories Inc, SI5367A-C-GQ Datasheet
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SI5367A-C-GQ
Specifications of SI5367A-C-GQ
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SI5367A-C-GQ Summary of contents
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ROGRAMMABLE Description The Si5367 is a low jitter, precision clock multiplier for applications requiring clock multiplication without jitter attenuation. The Si5367 accepts four clock inputs ranging from 10 to 707 MHz and generates five frequency-multiplied clock ...
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Si5367 Table 1. Performance Specifications (V = 1.8 ±5% or 2.5 V ±10 – º Parameter Symbol Temperature Range T A Supply Voltage V DD Supply Current I DD Input Clock Frequency CK F ...
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Table 1. Performance Specifications (Continued 1.8 ±5% or 2.5 V ±10 – º Parameter Symbol Duty Cycle Uncertainty CKO DC PLL Performance Jitter Generation J GEN Jitter Transfer J PK Phase Noise ...
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Si5367 622 MHz In, 622 MHz Out BW=877 kHz -50 -70 -90 -110 -130 -150 -170 1000 10000 OC-48, 12 kHz to 20 MHz OC-192, 20 kHz to 80 MHz OC-192, 4 MHz to 80 MHz OC-192, 50 kHz to ...
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System Power Supply 130 Ω 130 Ω CKIN1+ CKIN1– 82 Ω 82 Ω Input Clock Sources 3 130 Ω 130 Ω CKIN4+ CKIN4– 82 Ω 82 Ω CMODE Control Mode (L) ...
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Si5367 1. Functional Description The Si5367 is a low jitter, precision clock multiplier for applications requiring clock multiplication without jitter attenuation. The Si5367 accepts four clock inputs ranging from 10 to 707 MHz and generates five frequency-multiplied clock outputs ranging ...
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Pin Descriptions: Si5367 100 RST NC 4 VDD 5 6 VDD GND 7 GND 8 C1B 9 10 C2B C3B 11 INT_ALM 12 CS0_C3A 13 GND 14 15 VDD GND 16 17 ...
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Si5367 Table 3. Si5367 Pin Descriptions (Continued) Pin # Pin Name 5, 6, 15, 27, 32 42, 62, 63, 76, 79, 81, 84, 86, 89, 91, 94, 96, 99, 100 7, 8, 14, 16, 18, GND 19, 21, ...
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Table 3. Si5367 Pin Descriptions (Continued) Pin # Pin Name 12 INT_ALM 13 CS0_C3A 57 CS1_C4A 29 CKIN4+ 30 CKIN4– 34 CKIN2+ 35 CKIN2– Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5368 Register Map. I/O ...
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Si5367 Table 3. Si5367 Pin Descriptions (Continued) Pin # Pin Name 39 CKIN3+ 40 CKIN3– 44 CKIN1+ 45 CKIN1– 58 C1A 59 C2A 60 SCL 61 SDA_SDO A2_SS Note: Internal register names are indicated by ...
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Table 3. Si5367 Pin Descriptions (Continued) Pin # Pin Name 71 SDI 77 CKOUT3+ 78 CKOUT3– 82 CKOUT1– 83 CKOUT1+ 87 CKOUT5– 88 CKOUT5+ 90 CMODE 92 CKOUT2+ 93 CKOUT2– 97 CKOUT4– 98 CKOUT4+ GND PAD GND PAD Note: Internal ...
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... Si5367 3. Ordering Guide Ordering Part Output Clock Number Frequency Range Si5367A-C-GQ 10–945 MHz 970–1134 MHz 1.213–1.417 GHz Si5367B-C-GQ 10–808 MHz Si5367C-C-GQ 10–346 MHz 12 Package ROHS6, Pb-Free 100-Pin TQFP Yes 100-Pin TQFP Yes 100-Pin TQFP Yes Preliminary Rev. 0.4 Temperature Range – ...
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Package Outline: 100-Pin TQFP Figure 4 illustrates the package details for the Si5366. Table 4 lists the values for the dimensions shown in the illustration. Figure 4. 100-Pin Thin Quad Flat Package (TQFP) Table 4. Dimension Min Nom A ...
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Si5367 5. Recommended PCB Layout 14 Figure 5. PCB Land Pattern Diagram Preliminary Rev. 0.4 ...
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Table 5. PCB Land Pattern Dimensions Dimension Notes (General): 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ...
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Si5367 OCUMENT HANGE IST Revision 0.1 to Revision 0.2 Changed LVTTL to LVCMOS in Table 2, “Absolute Maximum Ratings,” on page 3. Updated “2. Pin Descriptions: Si5367”. Changed FSOUT (pins 87 and 88) to CLKOUT5. Changed FS_ALIGN ...
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N : OTES Preliminary Rev. 0.4 Si5367 17 ...
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