PI6CVF857ZDE Pericom Semiconductor, PI6CVF857ZDE Datasheet

PI6CVF857ZDE

Manufacturer Part Number

PI6CVF857ZDE

Description

IC PLL CLK DVR DDR-SDRAM 40-TQFN

Manufacturer

Pericom Semiconductor

Type

PLL Clock Driverr

Datasheet

1.PI6CVF857ZDE.pdf (13 pages)

Specifications of PI6CVF857ZDE

Input

SSTL-2

Output

SSTL-2

Frequency - Max

220MHz

Voltage - Supply

2.3 V ~ 2.7 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

40-TQFN

Frequency-max

220MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Product Features

• Operating Frequency up to 220 MHz for PC3200 Registered

• Distributes one differential clock input pair to ten differential

• Inputs (CLK,CLK) and (FBIN,FBIN)

• Input PWRDWN: LVCMOS

• Outputs (Yx, Yx), (FBOUT, FBOUT)

• External feedback pins (FBIN,FBIN) are used to

• Operates at 2.5V for PC1600, PC2100, PC2700,

• Packaging (Pb-free & Green available):

Block Diagram

DIMM applications

clock output pairs

synchronize the outputs to the clock input

and 2.6V for PC3200

– 48-pin TSSOP

PWRDWN

FBIN

AV DD

CLK

08-0298

Powerdown

and Test

Logic

PLL

FBOUT

Product Description

PI6CVF857 PLL clock device is developed for registered DDR DIMM

applications. The device is a zero-delay buffer that distributes a

differential clock input pair (CLK, CLK) to ten differential pairs of

clock outputs (Y[0:9], Y[0:9]), and one differential pair feedback clock

outputs (FBOUT,FBOUT) . The clock outputs are controlled by the

input clocks (CLK, CLK), the feedback clocks (FBIN,FBIN), the 2.5V

LVCMOS input (PWRDWN), and the Analog Power input (AV

When input PWRDWN is low while power is applied, the input

receivers are disabled, the PLL is turned off, and the differential clock

outputs are 3-stated. When the AV

turned off and bypassed for test purposes.

When the input frequency falls below a suggested detection fre-

quency that is below the operating frequency of the PLL, the device

will enter a low power mode. An input frequency detection circuit will

detect the low frequency condition and perform the same low power

features as when the PWRDWN input is low.

The PLL in the PI6CVF857 clock driver uses the input clocks (CLK,

CLK) and the feedback clocks (FBIN,FBIN) to provide high-perfor-

mance, low-skew, low-jitter output differential clocks (Y[0:9], Y[0:9]).

The PI6CVF857 is also able to track Spread Spectrum Clocking for

reduced EMI.

2.5V DDR-SDRAM Memory

1:10 PLL Clock Driver for

is strapped low, the PLL is

PI6CVF857

PS8683D

11/12/08

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PI6CVF857ZDE Summary of contents

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... Notes: 1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/ Pericom Semiconductor Corporation • 1-800-435-2336 • http://www.pericom.com 08-0298 .236 .244 See Note 4 12.4 12.6 See Note 3 .047 1.20 Max .002 .007 .0197 .006 .010 BSC 0.05 0.50 0.17 0.15 ...

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