MK1491-09FILNTR IDT, Integrated Device Technology Inc, MK1491-09FILNTR Datasheet - Page 4

• Manufacturer Part Number: MK1491-09FILNTR
• Description: IC CLK SRC AMD GEODE GX2 28-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Synthesizerr

Specifications of MK1491-09FILNTR

• Input: Crystal
• Output: LVCMOS
• Frequency - Max: 66MHz
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 66MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Power Down Control Table
Power-on Default Conditions
External Components
The MK1491-09 requires some inexpensive external
components for proper operation. Decoupling capacitors of
0.1µF should be connected on each VDD pin to ground, as
close to the MK1491-09 as possible. A series termination
resistor of 33 may be used for each clock output. See the
discussion below for other external resistors required for
proper I/O operation. The 14.318 MHz oscillator has internal
caps that provide the proper load for a parallel resonant
crystal with C
formula 2*(C
should be connected between X1 and ground and X2 and
ground.
IDT™ AMD GEODE™ GX2 CLOCK SOURCE
Pin #
MK1491-09
AMD GEODE™ GX2 CLOCK SOURCE
14
27
10
PD#
0
1
L
L
Function
-18) gives the value of each capacitor that
All clocks are stopped low.
All clocks are running.
Sel66/33#
=18 pF. For tuning with other values of C
Spread#
TS#
Default
Functions
H
H
H
Latched input. All outputs enabled when high. When low, all outputs are in
tristate.
Latched input. Spread disabled when high. When low, spread is enabled
on all outputs except ref clocks and 48 MHz.
This is an active input. When high, it selects PCI=66 MHz outputs; when
low, selects PCI frequency = 33 MHz outputs.
L
, the
4
I/O Structure
The MK1491-09 provides more functionality in a 28-pin
package by using a unique I/O technique. The device
checks the status of all I/O pins during power-up. This status
(pulled high or low) then determines the frequency
selections and power down modes (see the tables on pages
2 and 3). Within 10ms after power up, the inputs change to
outputs and the clocks start up. In the diagrams below, the
33 resistors are the normal output termination resistors.
The 10k resistor pulls low to generate a logic zero when
needed. Weak internal pull-up resistors are present on TS#,
Spread#, PD#, and Sel66/33 to pull the pin to high when left
floating.
*Note: Do not use a TTL load. This will overcome the 10 k
pull-down and force the input to a logic 1.
For select
= 0 (low)
Condition
I/O
10 k
Do not stuff for
33
“1” selection
CLOCK SYNTHESIZER
MK1491-09
To load*
REV M 051310