MC145484SD Freescale, MC145484SD Datasheet

MC145484SD

Manufacturer Part Number
MC145484SD
Description
Manufacturer
Freescale
Type
PCMr
Datasheet

Specifications of MC145484SD

Number Of Channels
1
Gain Control
Adjustable
Number Of Adc's
1
Number Of Dac's
1
Adc/dac Resolution
13b
Package Type
SSOP
Sample Rate
8KSPS
Number Of Adc Inputs
1
Number Of Dac Outputs
1
Operating Supply Voltage (max)
5.5V
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
20
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
5 V PCM Codec-Filter
selectable Mu–Law or A–Law companding, and is offered in 20–pin SOG,
SSOP, and TSSOP packages. This device performs the voice digitization and
reconstruction as well as the band limiting and smoothing required for PCM
systems. This device is designed to operate in both synchronous and
asynchronous applications and contains an on–chip precision reference
voltage.
encoder section. The encoder section immediately low–pass filters the analog
signal with an active R–C filter to eliminate very high frequency noise from being
modulated down to the passband by the switched capacitor filter. From the
active R–C filter, the analog signal is converted to a differential signal. From this
point, all analog signal processing is done differentially. This allows processing
of an analog signal that is twice the amplitude allowed by a single–ended
design, which reduces the significance of noise to both the inverted and
non–inverted signal paths. Another advantage of this differential design is that
noise injected via the power supplies is a common–mode signal that is
cancelled when the inverted and non–inverted signals are recombined. This
dramatically improves the power supply rejection ratio.
passes the analog signal from 200 Hz to 3400 Hz before the signal is digitized
by the differential compressing A/D converter.
converter. The output of the D/A is low–pass filtered at 3400 Hz and sinX/X
compensated by a differential switched capacitor filter. The signal is then filtered
by an active R–C filter to eliminate the out–of–band energy of the switched
capacitor filter.
which allows for decoupling of the internal circuitry that generates the
mid–supply V AG reference voltage, to the V SS power supply ground. This
reduces clock noise on the analog circuitry when external analog signals are
referenced to the power supply ground. This device is optimal for electronic
SLIC interfaces.
including Short Frame Sync, Long Frame Sync, IDL, and GCI timing
environments. This device also maintains compatibility with Motorola’s family
of Telecommunication products, including the MC14LC5472 and MC145572
U–Interface Transceivers, MC145474/75 and MC145574 S/T–Interface Trans-
c e i v e r s , M C 1 4 5 5 3 2 A D P C M Tr a n s c o d e r, M C 1 4 5 4 2 2 / 2 6 U D LT – 1 ,
MC145421/25 UDLT–2, and MC3419/MC33120 SLICs.
low–power performance and proven capability for complex analog/digital VLSI
functions.
REV 2
3/98
The MC145484 is a general purpose per channel PCM Codec–Filter with pin
This device has an input operational amplifier whose output is the input to the
After the differential converter, a differential switched capacitor filter band–
The decoder accepts PCM data and expands it using a differential D/A
The MC145484 PCM Codec–Filter has a high impedance V AG reference pin
The MC145484 PCM Codec–Filter accepts a variety of clock formats,
The MC145484 PCM Codec–Filter utilizes CMOS due to its reliable
Single 5 V Power Supply
Typical Power Dissipation of 15 mW, Power–Down of 0.01 mW
Fully–Differential Analog Circuit Design for Lowest Noise
Transmit Band–Pass and Receive Low–Pass Filters On–Chip
Active R–C Pre–Filtering and Post–Filtering
Mu–Law and A–Law Companding by Pin Selection
On–Chip Precision Reference Voltage of 1.575 V for a – 0 dBm TLP @ 600
Push–Pull 300
MC14LC5480EVK is the Evaluation Kit for This Device
TN98031100
Power Drivers with External Gain Adjust
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
20
20
20
MC145484DW
MC145484SD
MC145484DT
ORDERING INFORMATION
V AG Ref
MC145484
BCLKR
RO-
PO+
V DD
PO-
FSR
1
PDI
DR
PI
1
PIN ASSIGNMENT
1
1
2
3
4
5
6
7
8
9
10
SOG PACKAGE
Order this document
SOG Package
SSOP
TSSOP
DW SUFFIX
CASE 751D
CASE 940C
SD SUFFIX
CASE 948E
DT SUFFIX
20
19
18
17
16
15
14
13
12
11
TSSOP
SSOP
by MC145484/D
V AG
TI+
TI-
TG
Mu/A
V SS
FST
DT
BCLKT
MCLK
MC145484
1

Related parts for MC145484SD

MC145484SD Summary of contents

Page 1

... For More Information On This Product, Go to: www.freescale.com Order this document by MC145484/D MC145484 DW SUFFIX SOG PACKAGE 20 CASE 751D 1 SD SUFFIX SSOP CASE 940C SUFFIX TSSOP CASE 948E 20 1 ORDERING INFORMATION MC145484DW SOG Package MC145484SD SSOP MC145484DT TSSOP PIN ASSIGNMENT V AG Ref RO TI TI- PO PO+ 5 ...

Page 2

... The low–pass filter used to at- tenuate these aliasing components is typically called a re- construction or smoothing filter. The MC145484 PCM Codec–Filter has the codec, both presampling and reconstruction filters, and a precision volt- age reference on–chip. Go to: www.freescale.com RECEIVE SHIFT DR REGISTER FSR ...

Page 3

... All signals at this pin are referenced to the V AG pin. When TI+ is connected this pin is ignored. See the pin descriptions for the TI+ and TI– pins for more in- formation. This pin is high impedance when the device is in the powered–down mode. Go to: www.freescale.com MC145484 3 ...

Page 4

... This pin is the PCM data input, and when in a Long Frame Sync or Short Frame Sync mode is controlled by FSR and BCLKR. When in the IDL or GCI mode, this data transfer is controlled by FST and BCLKT. FSR and BCLKR select the B channel and ISDN mode, respectively. Go to: www.freescale.com MOTOROLA ...

Page 5

... DAC that defines the absolute gain or 0 dBm0 Transmis- sion Level Point (TLP) of the DAC. The timing for the PCM data transfer is independent of the companding scheme se- lected. Refer to Figure 2 for a summary and comparison of the four PCM data interface modes of this device. Go to: www.freescale.com load to MC145484 5 ...

Page 6

... Sign Bit / For More Information On This Product, MC145484 6 Mu–Law Chord Bits Step Bits Sign Bit Table 2. PCM Codes for Digital mW Mu–Law Chord Bits Step Bits Sign Bit to: www.freescale.com A–Law Chord Bits Step Bits A–Law Chord Bits Step Bits MOTOROLA ...

Page 7

... Figure 2d. GCI Interface — BCLKR = 0 (Transmit and Receive Have Common Clocking) Figure 2. Digital Timing Modes for the PCM Data Interface For More Information On This Product, MOTOROLA DON CARE B2-CHANNEL (FSR = 1) Go to: www.freescale.com DON'T CARE DON'T CARE DON CARE B2-CHANNEL (FSR = DON'T CARE MC145484 7 ...

Page 8

... IDL SYNC (FST), IDL CLK (BCLKT), IDL TX (DT), and IDL RX (DR). The IDL interface mode provides access to both the transmit and receive PCM data words with common control clocks of IDL Sync and IDL Clock. In this mode, the Go to: www.freescale.com MOTOROLA ...

Page 9

... This device was designed for ease of implementation, but due to the large dynamic range and the noisy nature of the environment for this device (digital switches, radio Go to: www.freescale.com MC145484 9 ...

Page 10

... V SS pin. Handset receivers and tele- phone line interface circuits using transformers may be F. This audio signal referenced completely to the V AG pin. Re- fer to the application schematics for examples of this circuitry. The V AG pin cannot be used for ESD or line protection. Go to: www.freescale.com MOTOROLA ...

Page 11

... Min 4.5 (No Load – 0.5 V) — (No Load – 1.5 V) — 3.0 V) PDI = V SS — FST and FSR = PDI = V DD — Symbol out Go to: www.freescale.com Value Unit V DD – 0 – – – stg – +150 C Typ Max Unit 5 ...

Page 12

... Receive 50 Power Drivers PI, PO+, PO– PI — — — – 0 — — 0 – 0.2 300 45 100 nF in series with 20 — 100 — kHz kHz — Go to: www.freescale.com Typ Max Unit 0.1 1.0 A — — M — — – 2 — dB 3000 — kHz 95 — dB – ...

Page 13

... Hz — — 1600 to 2600 Hz — — 2600 to 2800 Hz — — 2800 to 3000 Hz — — — — – 75 — — – to: www.freescale.com D/A Units Min Typ Max — — 1.575 — Vpk – 0.25 — + 0.25 dB 0.03 — — 0. ...

Page 14

... LONG FRAME SPECIFIC TIMING 50 — — SHORT FRAME SPECIFIC TIMING to: www.freescale.com Typ Max Unit 256 — kHz 512 — 1536 — 1544 — 2048 — 2560 — 4096 — — — — ns — — ns — ...

Page 15

... Freescale Semiconductor, Inc MCLK 1 BCLKT 11 FST 16 MSB DT 1 BCLKR 11 12 FSR MSB DR For More Information On This Product, MOTOROLA CH1 CH2 CH3 ST1 CH1 CH2 CH3 ST1 Figure 3. Long Frame Sync Timing Go to: www.freescale.com ST2 ST3 LSB ST2 ST3 LSB MC145484 15 ...

Page 16

... Freescale Semiconductor, Inc MCLK 12 1 BCLKT 20 11 FST 22 MSB DT 1 BCLKR FSR 13 MSB DR For More Information On This Product, MC145484 CH1 CH2 CH3 ST1 CH1 CH2 CH3 ST1 Figure 4. Short Frame Sync Timing Go to: www.freescale.com ST2 ST3 LSB ST2 ST3 LSB MOTOROLA ...

Page 17

... For More Information On This Product, MOTOROLA Characteristics ST1 ST2 ST3 LSB MSB CH1 CH2 CH3 38 37 ST1 ST2 ST3 LSB MSB CH1 CH2 CH3 Figure 5. IDL Interface Timing Go to: www.freescale.com Min Max Unit Note 2 20 — — ns 256 4096 kHz 50 — — — — — ...

Page 18

... For More Information On This Product, MC145484 18 Characteristics ST1 ST2 ST3 LSB MSB CH1 CH2 52 ST1 ST2 ST3 LSB MSB CH1 CH2 CH1 53 CH1 Figure 6. GCI Interface Timing Go to: www.freescale.com Min Max Unit Note 2 512 6176 kHz 50 — — — — ns — — — — ns — ...

Page 19

... Mu/A PO FST FSR BCLKR BCLKT 10 11 PDI MCLK Ref RO Mu/A PO FSR FST BCLKR BCLKT 10 11 PDI MCLK Go to: www.freescale.com 0.01 F ANALOG kHz PCM OUT 2.048 MHz PCM ANALOG kHz PCM OUT 2.048 MHz PCM IN MC145484 19 ...

Page 20

... OSC OSC OUT 1 OUT 2 MC74HC4060 1/2 MC74HC73 0.1 F 0.01 F 420 Ref RO PO+ Mu/A 420 FSR FST BCLKR BCLKT 10 11 PDI MCLK Go to: www.freescale.com 2.048 MHz (BCLKT, BCLKR, MCLK) 8 kHz (FST, FSR 1 MIC kHz PCM OUT 2.048 MHz PCM IN MOTOROLA ...

Page 21

... FSR FST BCLKR BCLKT 10 PDI MCLK Telephone Line with GCI Clocking 1 0 Ref RO PO- 5 Mu/A PO FSR FST BCLKR BCLKT 10 PDI MCLK Go to: www.freescale.com 0 FSC 8 kHz 13 D out 12 DCL 4.096 MHz TI+ 18 0 kHz 13 PCM OUT DT 12 2.048 MHz 11 PCM IN Telephone Line ...

Page 22

... Keep digital signal lines away from analog signal lines to keep noise from coupling into the analog sections. 4. See data sheets for additional information. Figure 13. POTS Line Interface Circuit Using MC145484, MC33120/21, and MC145436A For More Information On This Product, MC145484 22 Go to: www.freescale.com MC145436ADW MOTOROLA ...

Page 23

... Characteristics are symmetrical about analog zero with sign bit = 0 for negative analog values. 2. Digital code includes inversion of all magnitude bits. For More Information On This Product, MOTOROLA Digital Code Sign Chord Chord Chord Step to: www.freescale.com Normalized Decode Step Step Step Levels 8031 4191 2079 1023 495 231 MC145484 23 ...

Page 24

... Characteristics are symmetrical about analog zero with sign bit = 0 for negative analog values. 2. Digital code includes inversion of all even numbered bits. For More Information On This Product, MC145484 24 Digital Code Sign Chord Chord Chord Step to: www.freescale.com Normalized Decode Step Step Step Levels 4032 2112 1056 528 264 132 MOTOROLA ...

Page 25

... NOTE to: www.freescale.com NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION ...

Page 26

... SECTION N–N 10 0.25 (0.010 DETAIL DETAIL E Go to: www.freescale.com NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. ...

Page 27

... Freescale Semiconductor, Inc. For More Information On This Product, MOTOROLA This page intentionally left blank. Go to: www.freescale.com MC145484 27 ...

Page 28

... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...

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