PI6C48543LE Pericom Semiconductor, PI6C48543LE Datasheet
PI6C48543LE
Specifications of PI6C48543LE
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PI6C48543LE Summary of contents
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Features • Maximum operation frequency: 800 MHz • 4 pair of differential LVDS outputs • Selectable differential CLK and PCLK inputs • CLK, CLK pair accepts LVDS, LVPECL, LVHSTL, SSTL n and HCSL input level • PCLK, nPCLK pair supports ...
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Pin Description Name Pin # Type GND Connect to Ground Synchronized clock enable. When high, clock outputs follow clock input. When low, Q CLK_EN 2 I_PU outputs are forced low, CLK_ Clock select input. When high, ...
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Figure 1. CLK_EN Timing Diagram Disabled nCLK, nPCLK CLK, PCLK CLK_EN nQ0:nQ3 Q0:Q3 (See Figure 2) Clock Input Function Table Inputs CLK or PCLK CLK or PCLK Biased ...
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Operating Conditions Symbol Parameter V Power Supply Voltage CC T Ambient Temperature A I Power Supply Current CC LVCMOS/LVTTL DC Characteristics Symbol Parameter V Input High Voltage IH V Input Low Voltage IL CLK_SEL Input High I IH Current CLK_EN, ...
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LVDS DC Characteristics A Symbol Parameter V Differential Output Voltage OD ∆V VOD Magnitude Change OD V Offset Voltage OS ∆V VOS Magnitude Change OS I High Impedance Leakage Current OZ I Power OFF Leakage OFF I Differential Output ...
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... Figure 1: Single-ended Signal Driving Differential Input Packaging Mechanical: 20-Pin TSSOP ( .252 .260 6.4 6.6 .007 .0256 BSC .012 0.19 0.65 0.30 Ordering Information Ordering Code PI6C48543LE Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 08-0247 Clock Input C1 R2 0.1μ 1K .169 4.3 .177 4.5 ...