PI6C48535-01LEX Pericom Semiconductor, PI6C48535-01LEX Datasheet

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PI6C48535-01LEX

Manufacturer Part Number
PI6C48535-01LEX
Description
Clock Drivers & Distribution 2.5V 1:16 LVPECL Fanout Buffer
Manufacturer
Pericom Semiconductor
Type
Clock Driverr
Datasheets

Specifications of PI6C48535-01LEX

Number Of Clock Inputs
2
Output Logic Level
LVPECL
Mode Of Operation
Single-Ended
Output Frequency
500MHz
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
LVCMOS/LVTTL
Mounting
Surface Mount
Pin Count
20
Max Output Freq
500 MHz
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TSSOP-20
Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C48535-01LEX
Manufacturer:
PERICOM
Quantity:
20 000
Features
Block Diagram
CLK_SEL
CLK_EN
Maximum operation frequency: 500 MHz
4 pair of differential LVPECL outputs
Selectable CLK
CLK
Output Skew: 80ps (maximum)
Part-to-part skew: 150ps (maximum)
Propagation delay: 1.9ns (maximum)
3.3V power supply
Additive jitter of 36.7fs (typical)
Operating Temperature: -40
Packaging (Pb-free & Green available):
— 20-pin TSSOP (L)
CLK
11-0040
CLK
0
, CLK
1
1
accept LVCMOS, LVTTL input level
0
and CLK
0
1
1
inputs
o
C to 85
D
LE
Q
o
C
Q
n
Q
n
Q
n
Q
n
Q
Q
Q
Q
0
1
2
3
0
1
2
3
LVTTL/LVCMOS to LVPECL Fanout Buffer
1
Description
The PI6C48535-01 is a high-performance low-skew LVPECL
fanout buffer. PI6C48535-01 features two selectable single-ended
clock inputs and translates to four LVPECL outputs. The CLK
and CLK
are synchronized with input clock during asynchronous assertion/
deassertion of CLK_EN pin. PI6C48535-01 is ideal for single-
ended LVTTL/LVCMOS to LVPECL translations. Typical clock
translation and distribution applications are data-communications
and telecommunications.
Pin Configuration
1
inputs accept LVCMOS or LVTTL signals. The outputs
CLK_SEL
CLK_EN
CLK
CLK
V
V
NC
NC
NC
NC
CC
EE
0
1
1
2
3
4
5
6
7
8
9
10
3.3V Low Skew 1-to-4
20
19
18
17
16
15
14
13
12
11
PI6C48535-01
Q
NQ
V
Q
NQ
Q
NQ
V
Q
NQ
CC
CC
0
1
2
3
0
1
2
3
PS8735A
03/25/11
0

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PI6C48535-01LEX Summary of contents

Page 1

... Packaging (Pb-free & Green available): — 20-pin TSSOP (L) Block Diagram D CLK_EN LE CLK 0 CLK 1 1 CLK_SEL 11-0040 LVTTL/LVCMOS to LVPECL Fanout Buffer Description The PI6C48535- high-performance low-skew LVPECL fanout buffer. PI6C48535-01 features two selectable single-ended clock inputs and translates to four LVPECL outputs. The CLK and CLK 1 are synchronized with input clock during asynchronous assertion/ deassertion of CLK_EN pin. PI6C48535-01 is ideal for single- ended LVTTL/LVCMOS to LVPECL translations. Typical clock translation and distribution applications are data-communications and telecommunications Pin Configuration Q Q ...

Page 2

... LVCMOS / LVTTL clock input LVCMOS / LVTTL clock input No internal connection. Connect to 3.3V. Differential output pair, LVPECL interface level. Differential output pair, LVPECL interface level. Differential output pair, LVPECL interface level. Differential output pair, LVPECL interface level. Conditions Selected Source CLK Diasbled: Low 0 CLK Disabled: Low 1 CLK 0 CLK 1 2 PI6C48535-01 3.3V Low Skew 1-to-4 Description input. When low, selects CLK 1 0 Min. Typ. Max Outputs ...

Page 3

... Power Supply Current EE 11-0040 LVTTL/LVCMOS to LVPECL Fanout Buffer Enabled Enabled Outputs HIGH LOW Conditions Referenced to GND Referenced to GND Referenced to GND Conditions 500 MHz 3 PI6C48535-01 3.3V Low Skew 1-to-4 Min. Typ. Max. 4.6 -0.5 V +0.5V CC -0.5 V +0.5V CC -65 150 Min. Typ. Max. 3.0 3.3 3.6 -40 ...

Page 4

... Low Skew 1-to-4 = 3.0V to 3.6V unless otherwise stated below.) Min. Typ -0.3 -0.3 = 3.6V = 3. 3.6V -150 CC Min. Typ 0.6 Min. Typ. Max. 500 1.0 1.9 80 150 80 400 40 60 36.7 PI6C48535-01 Max. Units +0 1.3 V 0.8 V 150 Max. Units -0 1.0 Units MHz PS8735A 03/25/11 ...

Page 5

... LVTTL/LVCMOS to LVPECL Fanout Buffer .169 4.3 .177 4.5 .047 1.20 SEATING Max PLANE .002 0.05 .006 0.15 Package Code L Pb-free & Green 20-pin 173-mil wide TSSOP 5 PI6C48535-01 3.3V Low Skew 1-to-4 0.09 .004 .008 0.20 0.45 .018 0.75 .030 .238 .269 6.1 6.7 Package Description PS8735A 03/25/11 ...

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