AD8302-EVALZ Analog Devices Inc, AD8302-EVALZ Datasheet

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AD8302-EVALZ

Manufacturer Part Number
AD8302-EVALZ
Description
EVALUATION BOARD FOR AD8302
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8302-EVALZ

Lead Free Status / RoHS Status
Compliant
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
REV. A
PRODUCT DESCRIPTION
The AD8302 is a fully integrated system for measuring gain/loss
and phase in numerous receive, transmit, and instrumentation
applications. It requires few external components and a single
supply of 2.7 V–5.5 V. The ac-coupled input signals can range
from –60 dBm to 0 dBm in a 50 Ω system, from low frequencies
up to 2.7 GHz. The outputs provide an accurate measurement
of either gain or loss over a ± 30 dB range scaled to 30 mV/dB,
and of phase over a 0°–180° range scaled to 10 mV/degree.
Both subsystems have an output bandwidth of 30 MHz, which
may optionally be reduced by the addition of external filter
capacitors. The AD8302 can be used in controller mode to
force the gain and phase of a signal chain toward predetermined
setpoints.
The AD8302 comprises a closely matched pair of demodulating
logarithmic amplifiers, each having a 60 dB measurement range.
By taking the difference of their outputs, a measurement of
the magnitude ratio or gain between the two input signals is
available. These signals may even be at different frequencies,
allowing the measurement of conversion gain or loss. The AD8302
may be used to determine absolute signal level by applying the
unknown signal to one input and a calibrated ac reference signal
to the other. With the output stage feedback connection dis-
abled, a comparator may be realized, using the setpoint pins
MSET and PSET to program the thresholds.
FEATURES
Measures Gain/Loss and Phase up to 2.7 GHz
Dual Demodulating Log Amps and Phase Detector
Input Range –60 dBm to 0 dBm in a 50
Accurate Gain Measurement Scaling (30 mV/dB)
Accurate Phase Measurement Scaling (10 mV/Degree)
Measurement/Controller/Level Comparator Modes
Operates from Supply Voltages of 2.7 V–5.5 V
Stable 1.8 V Reference Voltage Output
Small Signal Envelope Bandwidth from DC to 30 MHz
APPLICATIONS
RF/IF PA Linearization
Precise RF Power Control
Remote System Monitoring and Diagnostics
Return Loss/VSWR Measurements
Log Ratio Function for AC Signals
Typical Nonlinearity < 0.5 dB
Typical Nonlinearity < 1 Degree
System
The signal inputs are single-ended, allowing them to be matched
and connected directly to a directional coupler. Their input
impedance is nominally 3 kΩ at low frequencies.
The AD8302 includes a phase detector of the multiplier type,
but with precise phase balance driven by the fully limited signals
appearing at the outputs of the two logarithmic amplifiers.
Thus, the phase accuracy measurement is independent of signal
level over a wide range.
The phase and gain output voltages are simultaneously available
at loadable ground referenced outputs over the standard output
range of 0 V to 1.8 V. The output drivers can source or sink up
to 8 mA. A loadable, stable reference voltage of 1.8 V is avail-
able for precise repositioning of the output range by the user.
In controller applications, the connection between the gain
output pin VMAG and the setpoint control pin MSET is broken.
The desired setpoint is presented to MSET and the VMAG
control signal drives an appropriate external variable gain device.
Likewise, the feedback path between the phase output pin VPHS
and its setpoint control pin PSET may be broken to allow
operation as a phase controller.
The AD8302 is fabricated on Analog Devices’ proprietary, high
performance 25 GHz SOI complementary bipolar IC process. It is
available in a 14-lead TSSOP package and operates over a –40°C
to +85°C temperature range. An evaluation board is available.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329–4700
Fax: 781/326-8703
COMM
RF/IF Gain and Phase Detector
OFSA
OFSB
VPOS
INPA
INPB
FUNCTIONAL BLOCK DIAGRAM
BIAS
AD8302
VIDEO OUTPUT – A
VIDEO OUTPUT – B
60dB LOG AMPS
60dB LOG AMPS
(7 DETECTORS)
(7 DETECTORS)
DETECTOR
PHASE
+
+
© Analog Devices, Inc., 2002
+
LF–2.7 GHz
AD8302
x3
www.analog.com
1.8V
MFLT
VMAG
MSET
PSET
VPHS
PFLT
VREF

AD8302-EVALZ Summary of contents

Page 1

... The signal inputs are single-ended, allowing them to be matched and connected directly to a directional coupler. Their input impedance is nominally 3 kΩ at low frequencies. The AD8302 includes a phase detector of the multiplier type, but with precise phase balance driven by the fully limited signals appearing at the outputs of the two logarithmic amplifiers. ...

Page 2

... AD8302–SPECIFICATIONS resistors connected to INPA and INPB, for Phase measurement P Parameter Conditions OVERALL FUNCTION Input Frequency Range Gain Measurement Range P IN φ Phase Measurement Range IN Pin VREF, –40°C ≤ T Reference Voltage Output INPUT INTERFACE Pins INPA and INPB To AC Ground, f ≤ 500 MHz ...

Page 3

... INPB ≤ +85° ± –30 dBm A INPA INPB = P = –5 dBm to –50 dBm INPB ≤ +85°C, Delta Phase = 90 Degrees A ≤ +85°C, Delta Phase = ± 30 Degrees ≤ +85°C A –3– AD8302 Min Typ Max Unit 28.7 mV/dB 0.25 dB 0.25 dB 0.2 dB 143 ...

Page 4

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8302 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 5

... COMM Circuit A VPOS VREF 10k 5k COMM Circuit C REV 750 ON TO LOG-AMP – 2k VPOS 10k MSET (PSET) 10k ACTIVE LOADS COMM Circuit D Figure 1. Equivalent Circuits –5– AD8302 VPOS 25 VMAG (VPHS) CLASS A-B CONTROL COMM Circuit B VPOS MFLT (PFLT) 1.5pF COMM Circuit E ...

Page 6

... AD8302 –Typical Performance Characteristics ( the reference input and V S INPB curves, the input signal levels are equal, unless otherwise noted.) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 –30 –25 –20 –15 –10 – MAGNITUDE RATIO – dB TPC 1. Magnitude Output (VMAG) vs. Input Level Ratio ...

Page 7

... Frequency 1900 MHz 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0. –65 TPC 12. VMAG Output vs. Input Level for INPA INPB –7– AD8302 –25 –20 –15 –10 – MAGNITUDE RATIO – dB –45dBm –45dBm –30dBm –15dBm –15dBm –20 – MAGNITUDE RATIO – ...

Page 8

... AD8302 1.06 1.04 1. INPA INPB 1.00 0.98 0.96 0.94 0.92 0. INPA 0.88 0.86 0.84 0.82 0. 0.78 INPA INPB 0.76 0.74 0 200 400 600 800 1000 1200 1400 FREQUENCY – MHz TPC 13. VMAG Output vs. Frequency, for dB, and – 5 dB, P INPB INPA INPB ...

Page 9

... TPC 24. VMAG Peak-to-Peak Output Induced by Sweeping Phase Difference through 360 Degrees vs. Magnitude Ratio, Frequencies 100 MHz, 900 MHz, 1900 MHz, 2200 MHz, and 2700 MHz –9– AD8302 INPUT –50dBm INPUT –30dBm INPUT –10dBm 10k 100k 1M 10M FREQUENCY – – ...

Page 10

... AD8302 1.8 100MHz 1.6 1.4 1900MHz 1.2 2200MHz 2700MHz 1.0 0.8 0.6 0.4 0.2 0.0 –180 –140 –100 –60 –20 20 PHASE DIFFERENCE – Degrees TPC 25. Phase Output (VPHS) vs. Input Phase Difference, Input Levels –30 dBm, Frequencies 100 MHz, 900 MHz, 1900 MHz, 2200 MHz, Supply 5 V, 2700 MHz 1 ...

Page 11

... Temperature, Three Sigma to Either Side of Mean, Frequency 1900 MHz 120 150 180 0.75 TPC 36. Phase Center Point (PCP) Distribution, Frequency 900 MHz, 17,000 Units –11– AD8302 MEAN +3 SIGMA MEAN –3 SIGMA –40 –30 –20 – TEMPERATURE – SIGMA –3 SIGMA 0 10 ...

Page 12

... AD8302 9.5 9.7 9.9 10.1 10.3 10.5 VPHS – mV/Degree TPC 37. VPHS Slope Distribution, Frequency 900 MHz 10mV PER VERTICAL DIVISION 50ns HORIZONTAL TPC 38. VPHS Output Response to 4 Step with Nominal Phase Shift Input Levels –30 dBm, Frequency 1900 MHz Filter Capacitor ...

Page 13

... TPC 48. Input Impedance, Modeled as Shunt R in Parallel = INPA with Shunt – 10 dB, INPB –13– AD8302 P = –20dBm INPA P = –40dBm INPA P = –30dBm INPA –180 –150 –120 –90 –60 – 120 150 180 PHASE DIFFERENCE – Degrees ...

Page 14

... AD8302 –2 –4 –6 –40 –30 –20 – TEMPERATURE – C TPC 49. Change in VREF vs. Temperature, Three Sigma to Either Side of Mean 120 100 10k 100k 1M FREQUENCY – Hz TPC 50. VREF Output Noise Spectral Density vs. Frequency 1.74 TPC 51. VREF Distribution, 17,000 Units 10M 100M –14– ...

Page 15

... V Φ relative phase in degrees. Structure The general form of the AD8302 is shown in Figure 2. The major blocks consist of two demodulating log amps, a phase detector, output amplifiers, a biasing cell, and an output refer- ence voltage buffer. The log amps and phase detector process the high frequency signals and deliver the gain and phase infor- mation in current form to the output amplifiers ...

Page 16

... Figure 3. Simplified Block Diagram of the Output Interface BASIC CONNECTIONS Measurement Mode The basic function of the AD8302 is the direct measurement of gain and phase. When the output pins, VMAG and VPHS, are connected directly to the feedback setpoint input pins, MSET and PSET, the default slopes and center points are invoked ...

Page 17

... The limits are determined by the minimum and maximum levels that each individual log amp can detect. In the AD8302, each log amp can detect inputs ranging from –73 dBV [(223 µV, –60 dBm re: 50 Ω ...

Page 18

... Figure 9. The Center Point Is Repositioned with the Help of the Internal Reference Voltage of 1.80 V Comparator and Controller Modes The AD8302 can also operate in a comparator mode if used in the arrangement shown in Figure 10 where the DUT is the element to be evaluated. The VMAG and VPHS pins are no longer connected to MSET and PSET ...

Page 19

... MAG SETPOINT “BLACK BOX” PHASE PSET SETPOINT VPHS Figure 12. Using the AD8302 to Measure the Gain and Insertion Phase of an Amplifier or Mixer Table I. Component Values for Measuring Amplifier with an Input Power of –10 dBm Component R1, R2 R5, R6 C1, C4, C5, C6 ...

Page 20

... The measurement accuracy can be compromised if board level details are not addressed. Minimize the physical distance between the series connected couplers since the extra path length adds phase error to . Keep the paths from the couplers to the AD8302 as well matched as possible since any differences ) ( ) − ...

Page 21

... VREF R9 SW2 R3 R8 PSET PHASE C8 R6 Figure 15b. Component Side Silkscreen of Evaluation Board Table III. Evaluation Board Configuration Options –21– AD8302 Table II. P1 Pin Allocations 1 Common 2 VPOS 3 Common Default Condition Not Applicable 52.3 Ω (Size 0402 kΩ (Size 0603 Ω (Size 0603 Ω ...

Page 22

... AD8302 CHARACTERIZATION SETUPS AND METHODS The general hardware configuration used for most of the AD8302 characterization is shown in Figure 16. The characterization board is similar to the Customer Evaluation Board. Two reference-locked R and S SMT03 signal generators are used as the inputs to INPA and INPB, while the gain and phase outputs are monitored using both a TDS 744A oscilloscope with 10× ...

Page 23

... Thin Shrink Small Outline Package [TSSOP] COPLANARITY REV. A OUTLINE DIMENSIONS (RU-14) Dimensions shown in millimeters 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 0.65 BSC 1.05 1.20 1.00 MAX 0.80 0.15 0.30 0.05 SEATING 0.20 0.19 PLANE 0.09 COMPLIANT TO JEDEC STANDARDS MO-153AB-1 –23– AD8302 0.75 8 0.60 0 0.45 ...

Page 24

Revision History Location 7/02—Data Sheet changed from REV REV. A. TPCs 3 through 6 replaced . . . . . . . . . . . . . . . . . . . . . . . ...