MCIMX27VJP4AR2 Freescale, MCIMX27VJP4AR2 Datasheet - Page 77

• Manufacturer Part Number: MCIMX27VJP4AR2
• Manufacturer: Freescale

Specifications of MCIMX27VJP4AR2

• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
1
Note:
SD10 and SD11 are determined by SDRAM controller register settings.
SD10
SD11
SD3
SD6
SD7
ID
SDRAM clock cycle time
Address setup time
Address hold time
Precharge cycle period
Auto precharge command period
SDR SDRAM CLK parameters are being measured from the 50%
point—that is, high is defined as 50% of signal value and low is defined as
50% of signal value.
The timing parameters are similar to the ones used in SDRAM data
sheets—that is,
are driven by the ESDCTL at the negative edge of SDCLK and the
parameters are measured at maximum memory frequency.
Table 39. SDRAM Refresh Timing Parameters (continued)
Parameter
Table 39
1
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
indicates SDRAM requirements. All output signals
1
NOTE
Symbol
tRC
tCK
tAS
tAH
tRP
Min
7.5
1.8
1.8
1
2
Electrical Characteristics
Max
20
—
—
—
4
clock
clock
Unit
ns
ns
ns
77