AD6622AS Analog Devices Inc, AD6622AS Datasheet - Page 22

• Manufacturer Part Number: AD6622AS
• Manufacturer: Analog Devices Inc

Specifications of AD6622AS

• Lead Free Status / RoHS Status: Not Compliant

AD6622
External
Address
7: Chan
6: Addr
5: Sync
4: Reset
3: Byte3
2: Byte2
1: Byte1
0: Byte0
External Address 7 Upper Address Register (Chan)
Sets the three most significant bits of the internal address, effec-
tively selecting channels 1, 2, 3, or 4 (D2:D0). The autoincrement
of read and write are also set (D7:D6).
External Address 6 Lower Address Register (Addr)
Sets the internal address 8 LSBs (D7:D0).
External Address 5 Sync
This register is read only. Bits in this address control the synchroni-
zation of the AD6622 channels. If the user intends to bring up
channels with no synchronization requirements, then all bits of
this register should be written low. Two types of sync signals
are available with the AD6622. The first is Soft Sync. Soft Sync
is software synchronization enabled through the Microport. The
second synchronization method is Pin Sync. Pin Sync is enabled
by a signal applied to the sync pin (Pin 62). See the Synchroni-
zation section of the data sheet for detailed explanations of the
different modes.
D7
Wrinc
IA7
Prog D
ID31
ID23
ID15
ID7
D6
Rdinc
IA6
Beam
Prog C
ID30
ID22
ID14
ID6
D5
IA5
Hop
Prog B
ID29
ID21
ID13
ID5
Table XII. External Memory Map
D4
IA4
Start
Prog A
ID28
ID20
ID12
ID4
External Data
External Address 4 Reset
Bits in this register determine how the chip is programmed and
enables the channels. The program bits (D7:D4) must be set
high to allow programming of CMEM and DMEM for each
channel. Sleep bits (D3:D0) are used to activate or sleep channels.
These can be used manually by the user to bring up a channel
by simply writing the required channel high. These bits can also
be used in conjunction with the Start and Sync signals avail-
able in External Address 5 to synchronize the channels. See
the Synchronization section of the data sheet for detailed expla-
nation of different modes.
External Address 3:0 (Data Bytes)
These bits set the internal address to be accessed for a read or
write.
D3
IA3
Sync D
Sleep D
ID27
ID19
ID11
ID3
D2
IA10
IA2
Sync C
Sleep C
ID26
ID18
ID10
ID2
D1
IA9
IA1
Sync B
Sleep B
ID25
ID17
ID9
ID1
D0
IA8
IA0
Sync A
Sleep A
ID24
ID16
ID8
ID0