M27C1001-70C6TR STMicroelectronics, M27C1001-70C6TR Datasheet - Page 5

• Manufacturer Part Number: M27C1001-70C6TR
• Manufacturer: STMicroelectronics

Specifications of M27C1001-70C6TR

• Organization: 128Kx8
• Interface Type: Parallel
• In System Programmable: External
• Access Time (max): 70ns
• Package Type: PLCC
• Reprogramming Technique: OTP
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 30mA
• Pin Count: 32
• Mounting: Surface Mount
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Table 7. Read Mode DC Characteristics
(TA = 0 to 70 C, –40 to 85 C or –40 to 125 C; V
Note: 1. V
Table 8A. Read Mode AC Characteristics
(TA = 0 to 70 C, –40 to 85 C or –40 to 125 C; V
Note: 1. V
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
t
t
Symbol
Symbol
EHQZ
GHQZ
V
will not occur.
t
t
t
t
I
I
V
GLQV
AXQX
V
AVQV
ELQV
I
I
I
IH
CC1
CC2
V
I
LO
CC
PP
OH
LI
OL
2. Maximum DC voltage on Output is V
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
IL
(2)
(2)
(2)
CC
CC
must be applied simultaneously with or before V
must be applied simultaneously with or before V
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
Output High Voltage CMOS
t
ACC
t
t
t
Alt
t
t
CE
OE
DF
DF
OH
Address Valid to
Output Valid
Chip Enable Low to
Output Valid
Output Enable Low
to Output Valid
Chip Enable High to
Output Hi-Z
Output Enable High
to Output Hi-Z
Address Transition
to Output Transition
Parameter
Parameter
CC
+0.5V.
Test Condi tion
E = V
E = V
G = V
G = V
(1)
E = V
E = V
IL
IL
(1)
, G = V
, G = V
PP
PP
IL
IL
IL
IL
CC
CC
I
OUT
and removed simultaneously or after V
and removed simultaneously or after V
0V
E = V
Test Condition
IL
IL
E > V
= 5V
0V
= 5V
I
I
OH
OH
I
= 0mA, f = 5MHz
OL
V
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
PP
Min Max Min Max Min Max Min Max
E = V
V
= –400 A
= –100 A
IL
0
0
0
V
= 2.1mA
CC
OUT
-35
, G = V
IN
= V
5% or 5V
5% or 5V
– 0.2V
IH
(3)
CC
35
35
25
25
25
V
V
CC
CC
IL
,
0
0
0
-45
10%; V
10%; V
M27C1001
45
45
25
25
25
V
CC
–0.3
Min
PP
PP
2.4
PP
PP
0
0
0
– 0.7V
2
.
.
-60
= V
= V
60
60
30
30
30
CC
CC
)
)
V
CC
Max
100
0
0
0
0.8
0.4
30
10
10
10
1
-70
M27C1001
+ 1
70
70
35
30
30
Unit
mA
mA
Unit
V
V
V
V
V
A
A
A
A
ns
ns
ns
ns
ns
ns
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