AD5255BRU250-RL7 Analog Devices Inc, AD5255BRU250-RL7 Datasheet - Page 15

• Manufacturer Part Number: AD5255BRU250-RL7
• Manufacturer: Analog Devices Inc

Specifications of AD5255BRU250-RL7

• Number Of Elements: 3
• Resistance (max): 250KOhm
• Power Supply Requirement: Single/Dual
• Interface Type: Serial (2-Wire/I2C)
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): ±2.5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): ±2.2V
• Dual Supply Voltage (max): ±2.7V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Not Compliant

THEORY OF OPERATION
The AD5255 digital potentiometer operates as a true variable
resistor. The RDAC register contents determine the resistor
wiper position. The RDAC register acts like a scratchpad
register, allowing unlimited resistance setting changes. RDAC
register contents are changed using the AD5255’s serial I
interface. See the RDAC I
the data-words and commands to program the RDAC registers.
Each RDAC register has a corresponding EEPROM memory
location, which provides nonvolatile storage of resistor wiper
position settings. The AD5255 provides commands to store the
RDAC register contents to their respective EEPROM memory
locations. During subsequent power-on sequences, the RDAC
registers are automatically loaded with the stored values.
Saving data from an RDAC register to EEPROM memory takes
approximately 25 ms and consumes 35 mA.
In addition to moving data between RDAC registers and
EEPROM memory, the AD5255 provides other shortcut
commands.
Table 9. AD5255 Shortcut Commands
No.
1
2.
3
4
5
6
7
8
9
10
11
1
2
LINEAR INCREMENT AND DECREMENT
COMMANDS
The increment and decrement commands (Command 10,
Command 11, Command 5, and Command 6) are useful for
linear step adjustment applications. These commands simplify
microcontroller software coding by allowing the controller to
send only an increment or decrement command to the AD5255.
The adjustment can be directed to an individual RDAC or to all
three RDACs.
Command leaves the device in the EEPROM read power state. Issue the NOP
command to return the device to the idle state.
Command requires acknowledge polling after execution.
Function
Restore EEPROM setting to RDAC
Store RDAC register contents to EEPROM
Decrement RDAC 6 dB (shift data bits right)
Decrement all RDACs 6 dB (shift all data bits right)
Decrement RDAC 1 step
Decrement all RDACs 1 step
Reset EEPROM setting to RDAC
Increment RDAC 6 dB (shift data bits left)
Increment all RDACs 6 dB (shift all data bits left)
Increment RDAC 1 step
Increment all RDACs 1 step
2
C Interface section for the format of
2
1
2
2
C
Rev. A | Page 15 of 20
LOGARITHMIC TAPER MODE ADJUSTMENT
(±6 dB/STEP)
The AD5255 accommodates logarithmic taper adjustment of
the RDAC wiper position(s) by shifting the register contents
left/right for increment/decrement operations. Command 8,
Command 9, Command 3, and Command 4 are used to
logarithmically increment or decrement the wiper positions
individually or change all three channel settings at the same time.
Incrementing the wiper position by +6 dB doubles the RDAC
register value, while decrementing by −6 dB halves it. Internally,
the AD5255 uses a shift register to shift the bits left and right to
achieve a logarithmic increment or decrement.
Nonideal ±6 dB step adjustment occurs under certain conditions.
Table 10 illustrates how the shifting function affects the data
bits of an individual RDAC. Each line going down the table
represents a successive shift operation. Note: The left-shift
commands (Command 10 and Command 11) were modified
such that if the data in the RDAC register equals 0 and the data
is shifted, the RDAC register is set to Code 1. Similarly, if the
data in the RDAC register is greater than or equal to midscale
and the data is left shifted, the data in the RDAC register is
automatically set to full scale. This makes the left-shift function
as close as possible to a logarithmic adjustment.
The right-shift commands (Command 3 and Command 4) are
ideal only if the LSB is a 0 (ideal logarithmic = no error). If the
LSB is 1, the right-shift function generates a linear half
LSB error.
Table 10. RDAC Register Contents after ±6 dB Step Adjustments
Left Shift (+6 dB/Step)
0 0000 0000
0 0000 0001
0 0000 0010
0 0000 0100
0 0000 1000
0 0001 0000
0 0010 0000
0 0100 0000
0 1000 0000
1 0000 0000
1 1111 1111
1 1111 1111
Actual conformance to a logarithmic curve between the data
contents in the RDAC register and the wiper position for each
right-shift command (Command 3 and Command 4) execution
contains an error only for odd numbers of bits. Even numbers
of bits are ideal.
Right Shift (−6 dB/Step)
1 1111 1111
0 1111 1111
0 0111 1111
0 0011 1111
0 0001 1111
0 0000 1111
0 0000 0111
0 0000 0011
0 0000 0001
0 0000 0000
0 0000 0000
AD5255