RU82566MC S L99J Intel, RU82566MC S L99J Datasheet - Page 14

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RU82566MC S L99J

Manufacturer Part Number
RU82566MC S L99J
Description
Manufacturer
Intel
Datasheet

Specifications of RU82566MC S L99J

Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
81
Lead Free Status / RoHS Status
Compliant
Table 11.
1.4.16
Table 12.
14
Shared Initialization Control (Word 13h)
Extended Configuration Word 1 (Word 14h)
Extended Configuration Word 1 (Word 14h)
5
4
3
2
1
0
15
14
13
12
11:0
Bit
Bit
Reserved
FRCSPD
FD
CLK_CNT_1_16
CLK_CNT_1_4
Dynamic Clock
Gating
Reserved
Reserved
PHY Write Enable
OEM Write Enable
Extended
Configuration
Pointer
Name
Name
0b
0b
0b
1b
0b
1b
0b
0b
1b
1b
20h
Default
Default
Reserved
Force Speed Enable
Default setting for the Force Speed bit in the Device Control
register (CTRL[11]).
0b = Normal operation.
1b = Use ICH9 speed.
Force Duplex
Default setting for duplex setting. Mapped to CTRL[0].
0b = Normal operation.
1b = Use ICH9 setting.
This bit is loaded to the CTRL_EXT.EnaKumCK16 bit and enables
the reduction of the internal JCLK to one-sixteenth of the external
NJCLK at the GLCI interface in Gigabit Ethernet mode.
0b = Reduction is disabled.
1b = Reduction is enabled.
This bit enables the automatic reduction of DMA frequency. It is
mapped to STATUS[31].
0b = Automatic reduction disabled.
1b = Automatic reduction enabled.
Dynamic Clock Gating
When set, enables dynamic clock gating of the DMA and MAC units.
This bit is loaded to the DynCK bit in the CTRL_EXT register.
0b = Disable.
1b = Enable.
This bit is reserved and must be set to 0b.
Reserved
This bit loads the extended PHY configuration area in the MAC. It is
loaded to the EXTCNF_CTRL register.
0b = Disable.
1b = Enabled
For the 82562V, set this bit to 0b.
When set, enables auto load of the OEM bits from the PHY_CTRL
register to the 82566/82567LM. It is loaded to the EXTCNF_CTRL
register.
0b = Disable.
1b = Enable.
For the 82562V, set this bit to 0b.
This field defines the base address (in Dwords) of the extended
configuration area in the NVM. It should equal a non-zero value.
NVM Information Guide—ICH9/82566/82567LM/82567V
Description
Description

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