SI3210-FTR Silicon Laboratories Inc, SI3210-FTR Datasheet - Page 115
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SI3210-FTR
Manufacturer Part Number
SI3210-FTR
Description
SLIC 1-CH 60dB 41mA 3.3V/5V 38-Pin TSSOP T/R
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Specifications of SI3210-FTR
Package
38TSSOP
Number Of Channels Per Chip
1
Polarity Reversal
Yes
Longitudinal Balanced
60 dB
Loop Current
41 mA
Minimum Operating Supply Voltage
3.13 V
Typical Operating Supply Voltage
3.3|5 V
Typical Supply Current
88 mA
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
PCM, SPI
Number Of Circuits
1
Voltage - Supply
3.3V, 5V
Current - Supply
88mA
Power (watts)
700mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
38-TSSOP
Includes
BORSCHT Functions, DTMF Generation and Decoding, FSK Generation, Pulse Metering Generation, Voice Loopback Test Modes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI3210-FTR
Manufacturer:
SILCONX
Quantity:
160
Part Number:
SI3210-FTR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Register 108. Enhancement Enable
Note: The Enhancement Enable register and associated features are available in silicon revisions C and later.
Reset settings = 0000_0000
Reset settings = 0000_0000
Name
Name
Bit
Type
Type
7
6
5
Bit
Bit
ILIMEN
FSKEN
ILIMEN
ILIMEN
DCSU
Name
R/W
R/W
D7
D7
Current Limit Increase.
When enabled, this bit temporarily increases the maximum differential current limit at the
end of a ring burst to enable a faster settling time to a dc linefeed state.
0 = The value programmed in ILIM (direct Register 71) is used.
1 = The maximum differential loop current limit is temporarily increased to 41 mA.
FSK Generation Enhancement.
When enabled, this bit will increase the clocking rate of tone generator 1 to 24 kHz only
when the REL bit (direct Register 32, bit 6) is set. Also, dedicated oscillator registers are
used for FSK generation (indirect registers 99–104). Audio tones are generated using
this new higher frequency, and oscillator 1 active and inactive timers have a finer bit res-
olution of 41.67 µs. This provides greater resolution during FSK caller ID signal genera-
tion.
0 = Tone generator always clocked at 8 kHz; OSC1, OSC1X., and OSC1Y are always
used.
1 = Tone generator module clocked at 24 kHz and dedicated FSK registers used only
when REL = 1; otherwise clocked at 8 kHz.
DC-DC Converter Control Speedup (Si3210 only).
When enabled, this bit invokes a multi-threshold error control algorithm which allows the
dc-dc converter to adjust more quickly to voltage changes.
0 = Normal control algorithm used.
1 = Multi-threshold error control algorithm used.
FSKEN
FSKEN
R/W
R/W
D6
D6
DCSU
R/W
D5
D5
ZSEXT
ZSEXT
Rev. 1.45
R/W
R/W
Si3210
Si3211
D4
D4
Function
SWDB
R/W
D3
D3
LCVE
LCVE
R/W
R/W
D2
D2
Si3210/Si3211
DCFIL
R/W
D1
D1
HYSTEN
HYSTEN
R/W
R/W
D0
D0
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