LT330-BD-0239A ARM, LT330-BD-0239A Datasheet

no-image

LT330-BD-0239A

Manufacturer Part Number
LT330-BD-0239A
Description
Manufacturer
ARM
Datasheet
1.LT330-BD-0239A.pdf (2 pages)

Specifications of LT330-BD-0239A

Lead Free Status / RoHS Status
Supplier Unconfirmed
The ARM® RealView® family of feature rich development boards provides an
excellent environment for prototyping system -on-chip designs. Through a
range of plug-in options, hardware and software applications can be
developed and debugged.
The high performance Versatile family enhances the end-user experience for
benchmarking and application development. It simplifies hardware and
software development, which shortens time to market.
Logic Tiles are the basic building blocks for FPGA prototyping with ARM
boards. Because of their flexible interconnect, Logic Tiles can be used to
prototype complete systems on chip, but they are normally used to expand
with custom AMBA peripherals the ARM subsystems provided on RealView
Platform Baseboards and the RealView Emulation Baseboard.
This datasheet describes the Logic Tile for XC5VLX330 Xilinx Virtex-5 FPGA.
Logic Tiles are based on a single FPGA to provide the highest flexibility in
terms of the number of FPGAs in the system. The signals from the FPGA are
routed to the upper and lower stacking headers, so that the design in the
FPGA can communicate with the design on the baseboard or on extra Logic
Tiles on top of it.
Logic Tile for XC5VLX330 FPGA
The Logic Tile for the Xilinx XC5VLX330 FPGA is implemented in a 65-nanometer
process with wider Look-Up-Tables inputs (6-input LUTs), which reduce critical path
delays, facilitating timing closure for ASIC prototyping. It has the same I/O
interconnect as the Logic Tiles for the Xilinx Virtex-4 FPGA with a maximum clock
frequency and capacity increase, making system partitioning easier. The Logic Tile for
the Xilinx Virtex-5 FPGA also features an on-board 32MB ZBT SRAM.
Logic Tiles feature configurable switches, which allow flexible interconnect between
boards without the need of cables. The clock architecture of Logic Tiles allows you to
stack up to five of them together with minimal clock skew.
Most of the signals on the Logic Tile stacking connectors work at 3.3V, but one
complete set of connectors have a configurable I/O voltage.

LT330-BD-0239A Summary of contents

Page 1

... It simplifies hardware and software development, which shortens time to market. Logic Tiles are the basic building blocks for FPGA prototyping with ARM boards. Because of their flexible interconnect, Logic Tiles can be used to prototype complete systems on chip, but they are normally used to expand with custom AMBA peripherals the ARM subsystems provided on RealView Platform Baseboards and the RealView Emulation Baseboard ...

Page 2

... Ordering Information Part number Description LT330-BD-0239A Logic Tile for XC5VLX330 ARM, ARM Powered, StrongARM, Thumb, Multi-ICE, PrimeCell, RealView, ARM7TDMI, ARM9TDMI, EmbeddedICE and Jazelle are registered trademarks of ARM Limited. ARM7TDMI- S, ARM7EJ-S, ARM720T, ARM920T, ARM922T, ARM9E, ARM926EJ - S, ARM946E-S, ARM966E-S, ARM1020E, ARM1022E, ARM1026EJ-S, ARM11, ARM1136J -S, ARM1136JF-S, ETK11, ETM, ETM7, ETM9, ETM10, ETM10RV, ETM11RV, ETB11, ETB, EmbeddedICE -RT, AMBA, ModelGen, ARM Developer Suite, Embedded Trace Macrocell, PrimeXsys, MOVE, Integrator, and JTEK are trademarks of ARM Limited. Java is a trademark of Sun Microsystems, Inc. XScale is a trademark of Intel Corporation. All other brand names or product names are the property of their respective holders. " ...