74ALVC162831DFG IDT, Integrated Device Technology Inc, 74ALVC162831DFG Datasheet

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74ALVC162831DFG

Manufacturer Part Number
74ALVC162831DFG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 74ALVC162831DFG

Lead Free Status / RoHS Status
Compliant
Drive Features for ALVC162831:
metal CMOS technology. This device is ideal for use in applications in
• Memory subsystems
• PC motherboards and servers
• Workstations
• Telecommunication applications
IDT74ALVC162831
3.3V CMOS 1-BIT TO 4-BIT ADDRESS REGISTER/DRIVER
c
– 0.5 MICRON CMOS Technology
– Typical t
– ESD > 2000V per MIL-STD-883, Method 3015;
– 0.40mm pitch TVSOP package
– Extended commercial range of – 40°C to +85°C
– V
– V
– V
– CMOS power levels (0.4µ W typ. static)
– Rail-to-Rail output swing for increased noise margin
– Balanced Output Drivers: ±12mA
– Low switching noise
This 1-bit to 4-bit address register/driver is built using advanced dual
1999 Integrated Device Technology, Inc.
> 200V using machine model (C = 200pF, R = 0)
CC
CC
CC
= 3.3V ±0.3V, Normal Range
= 2.7V to 3.6V, Extended Range
= 2.5V ±0.2V
SK(0)
(Output Skew) < 250ps
SEL
CLK
OE
OE
A
1
2
1
20
19
22
21
8
3.3V CMOS 1-BIT TO
4-BIT ADDRESS
REGISTER/DRIVER WITH
3-STATE OUTPUTS
TO EIGHT OTHER CHANNELS
D
CLK
Q
1
which a single address bus is driving four separate memory locations.
The ALVC162831 can be used as a buffer or a register, depending on
the logic level of the select (SEL) input.
follow the inputs and are controlled by the two output-enable (OE)
controls. Each OE controls two groups of nine outputs. When SEL is
logic low, the device is in the register mode. The register is an edge-
triggered D-type flip-flop. On the positive transition of the clock (CLK)
input, data set up at the A inputs is stored in the internal registers. OE
controls operate the same as in buffer mode.
low logic level). When OE is logic high, the outputs are in a high-
impedance state.
data can be retained or new data can be entered while the outputs are
in the high-impedance state.
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold
levels.
When SEL is logic high, the device is in the buffer mode. The outputs
When OE is logic low, the outputs are in a normal logic state (high or
SEL and OE do not affect the internal operation of the flip-flops. Old
The ALVC162831 has series resistors in the device output structure
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74ALVC162831
5
4
2
1
1
2
3
4
Y
Y
Y
Y
1
1
1
1
DSC-4706/-

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74ALVC162831DFG Summary of contents

Page 1

IDT74ALVC162831 3.3V CMOS 1-BIT TO 4-BIT ADDRESS REGISTER/DRIVER – 0.5 MICRON CMOS Technology – Typical t (Output Skew) < 250ps SK(0) – ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF ...

Page 2

IDT74ALVC162831 3.3V CMOS 1-BIT TO 4-BIT ADDRESS/REGISTER DRIVER GND ...

Page 3

IDT74ALVC162831 3.3V CMOS 1-BIT TO 4-BIT ADDRESS REGISTER/DRIVER Pin Names Description OEx 3-State Output Enable Inputs (Active LOW) CLK Register Input Clock SEL Select Input Ax Data Inputs xYx 3-State Outputs NC No Internal Connection Inputs OEx SEL CLK H ...

Page 4

IDT74ALVC162831 3.3V CMOS 1-BIT TO 4-BIT ADDRESS/REGISTER DRIVER Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER ...

Page 5

IDT74ALVC162831 3.3V CMOS 1-BIT TO 4-BIT ADDRESS REGISTER/DRIVER Symbol Parameter f MAX t Propagation Delay PLH xYx PHL t Propagation Delay PLH t SEL to xYx PHL t Propagation Delay PLH t CLK to xYx PHL t ...

Page 6

IDT74ALVC162831 3.3V CMOS 1-BIT TO 4-BIT ADDRESS/REGISTER DRIVER (1) ( 3.3V±0. 2.7V Symbol LOAD V 2.7 2 1.5 1 300 300 LZ V 300 300 HZ C ...

Page 7

IDT74ALVC162831 3.3V CMOS 1-BIT TO 4-BIT ADDRESS REGISTER/DRIVER IDT XX ALVC X XXX Family Temp. Range Bus-Hold CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 *To search for sales office near you, please click the sales button found on ...

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