PI74SSTVF16857AA Pericom Semiconductor, PI74SSTVF16857AA Datasheet - Page 6

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PI74SSTVF16857AA

Manufacturer Part Number
PI74SSTVF16857AA
Description
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI74SSTVF16857AA

Logic Family
SSTV
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Bits
14
Number Of Inputs
14
Number Of Outputs
14
High Level Output Current
-16mA
Low Level Output Current
16mA
Propagation Delay Time
5ns
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
210(Min)MHz
Mounting
Surface Mount
Pin Count
48
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Timing Requirements
Notes:
5. Data inputs must be held low for a minimum time of t
6. Data and clock inputs must be held at valid levels (not floating) for a minimum time of t
7. Data signal input slew rate ≥ 1 V/ns
8. Data signal input slew rate ≥ 0.5V/ns and <1V/ns
9. CLK, CLK input slew rates are ≥ 1 V/ns.
Switching Characteristics for PC1600 ~ PC2700
(over recommended operating free-air temperature range, unless otherwise noted.)
(See test circuits and switching waveforms).
Switching Characteristics for PC3200
(over recommended operating free-air temperature range, unless otherwise noted.)
(See test circuits and switching waveforms).
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min , after RESET is taken high
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5 .
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=
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,
.
D
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5
unless otherwise noted)
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=
±
M
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2 2
T
T
2 .
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5 .
6 .
a
y
y
min, after RESET is taken low.
. x
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V
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. p
±
±
0
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2 .
1 .
V
V
14-Bit Registered Buffer
V
M
. 0
. 0
2
0
0
DD
5 .
5 7
9 .
5 7
9 .
i
. n
M
M
=
PI74SSTVF16857A
1
5
1
5
2
a
0 .
a
0 .
8 .
8 .
.
6
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. x
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±
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04/24/08
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