HD74HC294FPEL Renesas Electronics America, HD74HC294FPEL Datasheet - Page 3

• Manufacturer Part Number: HD74HC294FPEL
• Manufacturer: Renesas Electronics America

Specifications of HD74HC294FPEL

• Lead Free Status / RoHS Status: Supplier Unconfirmed

HD74HC292/HD74HC294
Programmable Frequency Divider/Digital Timer
Description
This device divides the incoming clock frequency by a number (a power of 2) that is preset by the Programming inputs.
It has two Clock inputs, either of which may be used as a clock inhibit. The device also has an active-low Reset, which
initializes the internal flip-flop states. Test Point outputs (TP1, TP2, TP3) are provided with HD74HC292 to facilitate
incoming inspections.
Test Point output is provided with HD74HC294 to facilitate incoming inspections.
Features
Note: Please consult the sales office for the above package availability.
Function Table
H :
L :
Rev.2.00 Jan 31, 2006 page 1 of 9
HD74HC292P
HD74HC294FPEL
High Speed Operation: t
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
Low Input Current: 1 µA max
Low Quiescent Supply Current: I
Ordering Information
Part Name
high level
low level
CLR
H
H
H
H
L
DILP-16 pin
SOP-16 pin (JEITA)
Package Type
pd
(Clock to Q) = 16 ns typ (C
CC
= 2 to 6 V
CC
(static) = 4 µA max (Ta = 25°C)
CLK1
H
X
X
L
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
(Previous Code)
Package Code
L
= 50 pF)
P
FP
Abbreviation
Package
CLK2
X
H
X
L
—
EL (2,000 pcs/reel)
Taping Abbreviation
(Previous ADE-205-486)
Q Output Mode
REJ03D0608–0200
(Quantity)
Cleared to L
Count
Count
Inhibit
Inhibit
Jan 31, 2006
Rev.2.00