UPD8871CY Renesas Electronics America, UPD8871CY Datasheet
UPD8871CY
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UPD8871CY Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR DESCRIPTION µ The PD8871 is a color CCD (Charge Coupled Device) linear image sensor which changes optical images to electrical signal and has the function of color separation. µ The PD8871 ...
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BLOCK DIAGRAM V GND GND OUT 30 (Blue OUT 31 (Green OUT 32 (Red φ φ φ CLB CCD analog shift register Transfer gate ...
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PIN CONFIGURATION (Top View) CCD linear image sensor 32-pin plastic DIP (10.16 mm (400)) µ • PD8871CY-A Ground GND Reset feed-through level φ CLB clamp clock φ Last stage shift register clock 1 φ Reset gate clock No connection Internal ...
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PHOTOCELL STRUCTURE DIAGRAM µ m µ Channel stopper Aluminum shield 4 PHOTOCELL ARRAY STRUCTURE DIAGRAM (Line spacing) µ Blue photocell array µ Green photocell array µ Red photocell array Data Sheet ...
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ABSOLUTE MAXIMUM RATINGS (T Parameter Output drain voltage V OD Shift register clock voltage φ 1 Reset gate clock voltage V φ RB Reset feed-through level clamp V φ CLB clock voltage Transfer gate clock voltage V ...
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ELECTRICAL CHARACTERISTICS = +25° data rate (f φ light source : 3200 K halogen lamp + C-500S (infrared cut filter mm) + HA-50 (heat absorbing filter ...
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V INPUT PIN CAPACITANCE (T A Parameter Shift register clock pin capacitance 1 Shift register clock pin capacitance 2 Last stage shift register clock pin capacitance Reset gate clock pin capacitance Reset feed-through level clamp clock pin capacitance ...
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Data Sheet S15329EJ3V0DS µ PD8871 ...
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TIMING CHART 2 (Bit clamp mode, for each color) φ 1 φ 2 φ 90% φ 90% φ CLB 10% V OUT Symbol t1, t2 t1’, t2’ t5, ...
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TIMING CHART 3 (Line clamp mode, for each color) φ 1 φ 2 φ 90% φ RB 10% "H" φ CLB V OUT Symbol t1, t2 t1’, t2’ t5 ...
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TG1 to TG3 TIMING CHART φ φ TG1 to TG3 90% φ φ φ 2 φ φ φ RB φ CLB (Bit clamp mode) φ CLB (Line clamp mode) Symbol ...
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DEFINITIONS OF CHARACTERISTIC ITEMS 1. Saturation voltage : V sat Output signal voltage at which the response linearity is lost. 2. Saturation exposure : SE Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage ...
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Dark signal non-uniformity : DSNU Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. This is calculated by the following formula. DSNU (mV) : ...
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Random noise (CDS) : CDS σ Random noise CDS is defined as the standard deviation of a valid pixel output signal with 100 times (=100 lines) data sampling at dark (light shielding). 1. One valid photocell in one ...
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STANDARD CHARACTERISTIC CURVES (Reference Value) DARK OUTPUT TEMPERATURE CHARACTERISTIC 0.5 0.25 0 Operating Ambient Temperature T TOTAL SPECTRAL RESPONSE CHARACTERISTICS (without infrared cut filter and heat absorbing filter) (T 100 B ...
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APPLICATION CIRCUIT EXAMPLE + µ µ 10 F/ Ω φ CLB 150 Ω φ Ω φ RB φ 2 4.7 Ω 4.7 Ω 4.7 Ω Cautions 1. Leave pins 6, 7, 12, ...
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Remarks the application circuit example are shown in the figure below EQUIVALENT CIRCUIT CCD 2. Number and type of inverters in the application circuit example are different by data rate. The following ...
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PACKAGE DRAWING µ PD8871CY CCD LINEAR IMAGE SENSOR 32-PIN PLASTIC DIP (10.16 mm (400) ) (Unit : mm) 55.2±0.5 54.8±0.5 1st valid pixel 1 6.15±0 46.7 12.6±0.5 1.02±0.15 0.46±0 2.0 4.1±0.5 4.55±0.5 2.54±0.25 (5.42) 4.21±0.5 ...
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RECOMMENDED SOLDERING CONDITIONS When soldering this product highly recommended to observe the conditions as shown below. If other soldering processes are used the soldering is performed under different conditions, please make sure to consult with our ...
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NOTES ON HANDLING THE PACKAGES 1 DUST AND DIRT PROTECTING The optical characteristics of the CCD will be degraded if the cap is scratched during cleaning. Don’t either touch plastic cap surface by hand or have any object come in ...
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Data Sheet S15329EJ3V0DS µ PD8871 21 ...
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Data Sheet S15329EJ3V0DS µ PD8871 ...
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NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...
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The information in this document is current as of February, 2006. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most ...