PALCE16V8-25PC Cypress Semiconductor Corp, PALCE16V8-25PC Datasheet
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PALCE16V8-25PC
Specifications of PALCE16V8-25PC
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PALCE16V8-25PC Summary of contents
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... High reliability — Proven Flash technology — 100% programming and functional testing Functional Description The Cypress PALCE16V8 is a CMOS Flash Electrical Erasable second-generation programmable array logic device implemented with the familiar sum-of-product (AND-OR) logic structure and the programmable macrocell. I ...
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... AND array. The first product term in a macrocell can be used either as an internal output enable control data product term. There are a total of 18 architecture bits in the PALCE16V8 macrocell; two are global bits that apply to all macrocells and 16 that apply locally, two bits per macrocell. The architecture bits determine whether the macrocell functions as a register or combinatorial with inverting or noninverting output ...
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... Macrocell Document #: 38-03025 Rev. *A CL0 CLK CL1 x CG for pin for pin 12 and 19 0 PALCE16V8 To Adjacent 1 1 Macrocell From 0 X Adjacent Pin CL0 x I/O x Page ...
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... IL IH 10, 15 Output Open, 15L, 25L MHz (counter) 10, 15 15L, 25L ns 15L, 25L ns Test Conditions MHz 2. MHz OUT Test Conditions Normal Programming Conditions PALCE16V8 Ambient Temperature V CC ° ° 5V ± +75 C ° ° 5V ±10% – +125 C ° ° 5V ±10% –40 ...
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... Min. Max. Min. Max. Min 7 14.5 OL internal (1 measured (see Note 7 above) minus t MAX MAX3 PALCE16V8 90% 10% < TEST POINT Military R R Measured Output Value 1 2 390Ω 750Ω H · · 16V8-10 16V8-15 16V8-25 Max. Min. Max. Min 7.5 ...
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... Min. Max. Min. Max 143 100 [7, 11] 166 125 [7, 12] 166 125 [7] 16V8-10 Min. Max. 3 [8, 9] [7] [7, 10] [ [ 62.5 [7, 13 [7, 14] [7] 1 PALCE16V8 [2] 16V8-10 16V8-15 16V8-25 Min. Max. Min. Max. Min 45 62.5 41 16V8-15 16V8-25 Min. Max. Min ...
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... Switching Waveform INPUTS, I/O, REGISTERED FEEDBACK REGISTERED OUTPUTS COMBINATORIAL OUTPUTS Power-Up Reset Waveform 10% POWER SUPPLY VOLTAGE REGISTERED ACTIVE LOW OUTPUTS CLOCK Document #: 38-03025 Rev 90 MAX = 1 µ PALCE16V8 ] [10 [10 PXZ ER EA PZX [10] [10 PXZ ER EA PZX Page ...
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... Functional Logic Diagram for PALCE16V8 PIN NUMBERS PRODUCT LINE FIRST CELL NUMBERS 128 160 192 224 2 256 288 320 352 384 416 448 480 3 512 544 576 608 640 672 704 736 4 768 800 832 864 896 928 960 992 5 1024 ...
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... PALCE16V8-5JC 115 7 PALCE16V8-7JC PALCE16V8-7PC 90 10 7.5 7 PALCE16V8-10JC PALCE16V8-10PC 130 10 7.5 7 PALCE16V8-10JI PALCE16V8-10PI 130 PALCE16V8-10DMB PALCE16V8-10LMB PALCE16V8-15JC PALCE16V8-15PC 130 PALCE16V8-15PI PALCE16V8-15DMB PALCE16V8-15LMB PALCE16V8-25JC PALCE16V8-25PC 130 PALCE16V8-25JI PALCE16V8-25DMB PALCE16V8-25LMB 55 10 7.5 7 PALCE16V8L-10JC PALCE16V8L-10PC PALCE16V8L-10JI PALCE16V8L-10PI PALCE16V8L-15JC PALCE16V8L-15PC PALCE16V8L-15DMB PALCE16V8L-15LMB PALCE16V8L-25JC PALCE16V8L-25PC PALCE16V8L-25DMB PALCE16V8L-25LMB Shaded areas contain preliminary information ...
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... MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Package Diagrams Document #: 38-03025 Rev. *A Switching Characteristics Parameter t PD Subgroups 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A PALCE16V8 Subgroups 10, 11 51-80029-** Page ...
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... Package Diagrams (continued) Document #: 38-03025 Rev. *A 20-Lead Plastic Leaded Chip Carrier J61 20-Square Leadless Chip Carrier L61 PALCE16V8 51-85000-*A 51-80049-** Page ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 20-Lead (300-Mil) Molded DIP P5 PALCE16V8 51-85011-*A Page ...
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... Document History Page Document Title: PALCE16V8 Flash Erasable Reprogrammable CMOS PAL Document Number: 38-03025 REV. ECN NO. Issue Date ** 106370 07/11/01 *A 213375 See ECN Document #: 38-03025 Rev. *A Orig. of Change SZV Change from Spec Number: 38-00364 to 38-03025 FSG Added note to title page: “Use Ultra37000 For All New Designs” ...