5962-8863702LX Cypress Semiconductor Corp, 5962-8863702LX Datasheet
5962-8863702LX
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5962-8863702LX Summary of contents
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... Note: 1. The CG7C323 is the PLDC20G10 packaged in the JEDEC-compatible 28-pin PLCC pinout. Pin function and pin order is identical for both PLCC pinouts. The difference is in the location of the “no connect” pins. Cypress Semiconductor Corporation Document #: 38-03010 Rev. *A USE ULTRA37000™ FOR ...
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Selection Guide I (mA) CC Generic Part Number Com/Ind 20G10B–15 70 20G10B–20 70 20G10B–25 20G10–25 55 20G10–30 20G10–35 55 20G10–40 Functional Description Cypress PLDC20G10 uses an advanced 0.8-micron CMOS technology and a proven EPROM cell as the programmable element. This ...
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Programmable Output Cell Configuration Table Figure ...
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Combinatorial Output Configurations Figure 5. Product Term OE/Active LOW PIN 13 Figure 7. Pin 13 OE/Active Low Note: 2. Bidirectional I/O configurations are possible only when the combinatorial output option is selected Document #: 38-03010 Rev. *A USE ULTRA37000™ FOR ...
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Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential ............... –0.5V to +7.0V DC ...
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AC Test Loads and Waveforms (Commercial) R1 238 Ω (319Ω MIL) 5V OUTPUT 50pF INCLUDING JIG AND SCOPE (a) Equivalent to: THÉVENIN EQUIVALENT (Commercial) 99Ω OUTPUT 2.08V=V Switching Characteristics Over Operating Range Parameter Description t Input or Feedback to Non-Registered ...
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Switching Characteristics Over Operating Range (continued) Parameter Description [10] t Clock Period P t Clock High Time WH t Clock Low Time WL [11] f Maximum Frequency MAX Switching Waveform INPUTS I/O, REGISTERED FEEDBACK ...
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Functional Logic Diagram • • • • • • • • • • • • • • • ...
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Ordering Information (ns) (ns) (ns) (mA) Ordering Code PLDC20G10B–15PC PLDC20G10B–15WC 100 PLDC20G10B–20DMB PLDC20G10–25JC PLDC20G10–25PC/PI PLDC20G10–25WC PLDC20G10–30DMB PLDC20G10–30LMB ...
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Package Diagrams Document #: 38-03010 Rev. *A USE ULTRA37000™ FOR ALL NEW DESIGNS 24-Lead (300-Mil) CerDIP D14 MIL-STD-1835 D- 9 Config.A 28-Lead Plastic Leaded Chip Carrier J64 PLDC20G10B PLDC20G10 51-80031-** 51-85001-*A Page [+] Feedback ...
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Package Diagrams (continued) Document #: 38-03010 Rev. *A USE ULTRA37000™ FOR ALL NEW DESIGNS 28-Square Leadless Chip Carrier L64 MIL-STD-1835 C-4 PLDC20G10B PLDC20G10 51-80051-** Page [+] Feedback ...
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Package Diagrams (continued) Document #: 38-03010 Rev. *A USE ULTRA37000™ FOR ALL NEW DESIGNS 28-Pin Windowed Leaded Chip Carrier H64 PLDC20G10B PLDC20G10 51-80077-** Page [+] Feedback ...
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... Document #: 38-03010 Rev. *A © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document History Page Document Title: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Document Number: 38-03010 REV. ECN NO. Issue Date ** 106292 04/25/01 *A 213375 See ECN Document #: 38-03010 Rev. *A USE ULTRA37000™ FOR ALL NEW DESIGNS Orig. of ...