MC9328MXLVP15R2 Freescale, MC9328MXLVP15R2 Datasheet - Page 83
MC9328MXLVP15R2
Manufacturer Part Number
MC9328MXLVP15R2
Description
Manufacturer
Freescale
Datasheet
1.MC9328MXLVP15R2.pdf
(90 pages)
Specifications of MC9328MXLVP15R2
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9328MXLVP15R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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The limitation on pixel clock rise time / fall time are not specified. It should be calculated from the hold
time and setup time, according to:
In most of case, duty cycle is 50 / 50, therefore:
For example: Given pixel clock period = 10ns, duty cycle = 50 / 50, hold time = 1ns, setup time = 1ns.
Falling-edge latch data
Freescale Semiconductor
max rise time allowed = (positive duty cycle - hold time)
max fall time allowed = (negative duty cycle - setup time)
max rise time = (period / 2 - hold time)
max fall time = (period / 2 - setup time)
positive duty cycle = 10 / 2 = 5ns
=> max rise time allowed = 5 - 1 = 4ns
negative duty cycle = 10 / 2 = 5ns
=> max fall time allowed = 5 - 1 = 4ns
max fall time allowed = (negative duty cycle - hold time)
max rise time allowed = (positive duty cycle - setup time)
VSYNC
DATA[7:0]
PIXCLK
Ref No.
1
2
3
4
5
6
Figure 66. Sensor Output Data on Pixel Clock Rising Edge
csi_vsync to csi_pixclk
csi_d setup time
csi_d hold time
csi_pixclk high time
csi_pixclk low time
csi_pixclk frequency
CSI Latches Data on Pixel Clock Falling Edge
Table 36. Non-Gated Clock Mode Parameters
1
Parameter
MC9328MXL Technical Data, Rev. 8
2
Valid Data
3
10.42
10.42
Min
180
1
1
0
Valid Data
Functional Description and Application Information
5
Max
48
–
–
–
–
–
6
4
Valid Data
MHz
Unit
ns
ns
ns
ns
ns
83
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