MC9328MXSVP10R2 Freescale, MC9328MXSVP10R2 Datasheet - Page 19
MC9328MXSVP10R2
Manufacturer Part Number
MC9328MXSVP10R2
Description
Manufacturer
Freescale
Datasheet
1.MC9328MXSVP10R2.pdf
(74 pages)
Specifications of MC9328MXSVP10R2
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
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Manufacturer
Quantity
Price
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4.1
All registers in the ETM9 are programmed through a JTAG interface. The interface is an extension of the
ARM920T processor’s TAP controller, and is assigned scan chain 6. The scan chain consists of a 40-bit
shift register comprised of the following:
The data to be written is scanned into the 32-bit data field, the address of the register into the 7-bit address
field, and a 1 into the read/write bit.
A register is read by scanning its address into the address field and a 0 into the read/write bit. The 32-bit
data field is ignored. A read or a write takes place when the TAP controller enters the UPDATE-DR state.
The timing diagram for the ETM9 is shown in
in
Freescale Semiconductor
Figure
•
•
•
Ref No.
2a
2b
3a
3b
4a
4b
32-bit data field
7-bit address field
A read/write bit
1
Embedded Trace Macrocell
2.
CLK frequency
Clock high time
Clock low time
Clock rise time
Clock fall time
Output hold time
Output setup time
Output Trace Port
(Half-Rate Clocking Mode)
TRACECLK
TRACECLK
Parameter
Table 9. Trace Port Timing Diagram Parameter Table
Figure 2. Trace Port Timing Diagram
MC9328MXS Technical Data, Rev. 3
Minimum
3a
2.28
3.42
1.3
0
3
–
–
1.8 ± 0.1 V
Figure
3b
2a
Maximum
2. See
85
–
–
4
3
–
–
4a
2b
Table 9
Valid Data
Functional Description and Application Information
for the ETM9 timing parameters used
Minimum
0
2
2
–
–
2
3
1
3.0 ± 0.3 V
Valid Data
Maximum
100
–
–
3
3
–
–
4b
MHz
Unit
ns
ns
ns
ns
ns
ns
19