MCIMX253DVM4 Freescale, MCIMX253DVM4 Datasheet - Page 68
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MCIMX253DVM4
Manufacturer Part Number
MCIMX253DVM4
Description
Manufacturer
Freescale
Datasheet
1.MCIMX253DVM4.pdf
(154 pages)
Specifications of MCIMX253DVM4
Operating Temperature (min)
-20C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCIMX253DVM4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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3.7.6.2
The i.MX25 NFC supports normal timing mode, using two Flash clock cycles for one access of RE and
WE. AC timings are provided as multiplications of the clock cycle and fixed delay.
Figure 37
under normal mode.
68
2
3
SDRAM CLK and DQS-related parameters are measured from the 50% point. That is, high is defined as 50% of the signal
value, and low is defined as 50% of the signal value. DDR SDRAM CLK parameters are measured at the crossing point of
SDCLK and SDCLK (inverted clock).
The value was calculated for an SDCLK frequency of 133 MHz, by the formula tQH = tHP – tQHS = min. (tCL,tCH) – tQHS =
0.45*tCK – tQHS = 0.45 * 7.5 – 0.45 = 2.925 ns
depicts the relative timing between NFC signals at the module level for different operations
NAND Flash Controller (NFC) Timing
NFCE
NFIO[7:0]
NFWE
NFCLE
NFWE
NFALE
NFCE
NFCLE
NFIO[7:0]
NFALE
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 7
Table 55
Figure 34. Command Latch Cycle Timing Diagram
Figure 35. Address Latch Cycle Timing Diagram
describes the timing parameters (NF1–NF17) that are shown in the figures.
NF6
NF6
NF3
NF3
NF1
NF1
Command
NF8
Address
NF5
NF8
NF5
NF10
NF4
NF9
NF7
NF9
NF7
NF11
NF2
NF4
Figure 34
Freescale Semiconductor
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