MC10XS3412CPNA Freescale, MC10XS3412CPNA Datasheet - Page 36
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MC10XS3412CPNA
Manufacturer Part Number
MC10XS3412CPNA
Description
Manufacturer
Freescale
Datasheet
1.MC10XS3412CPNA.pdf
(53 pages)
Specifications of MC10XS3412CPNA
Switch Type
High Side
Power Switch Family
MC10XS3412
Input Voltage
4 to 28V
Power Switch On Resistance
36/44Ohm
Output Current
6A
Number Of Outputs
4
Mounting
Surface Mount
Supply Current
6.5mA
Package Type
PQFN
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Pin Count
24
Lead Free Status / RoHS Status
Compliant
DEVICE REGISTER ADDRESSING
addresses (D[14:10]) and their impact on device operation.
ADDRESS XX000 — STATUS REGISTER
(STATR_S)
the various configuration register contents without disrupting
the device operation or the register contents. The register bits
D[4:0] determine the content of the first sixteen bits of SO
data. In addition to the device status, this feature provides the
ability to read the content of the PWMR_s, CONFR0_s,
CONFR1_s, OCR_s, GCR and CALR registers (Refer to the
section entitled
Return Data) on page
ADDRESS A
REGISTER (PWMR_S )
of corresponding output through the SPI. Each output “s” is
independently selected for configuration based on the state
of the D14 : D13 bits
36
10XS3412
Table 11. Serial Input Address and Configuration Bit Map
state after
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
CONFR0_
CONFR1_
V
RST=0 or
condition
PWMR_s WDI
STATR_s WDI
V
Register
Register
x = Don’t care.
s = Output selection with the bits A
SUPPLY(P
OCR_s
CALR
DD(FAIL)
GCR
The following section describes the possible register
The STATR register is used to read the device status and
The PWMR_s register allows the MCU to control the state
OR)
SI
or
s
s
WDI
WDI
WDI
WDI
WDI
D15
N
N
N
N
N
N
N
0
1
D1
A
A
A
A
Serial Output Communication (Device Status
X
4
0
0
0
A
1
1
1
1
0
D13
001— OUTPUT PWM CONTROL
A
A
A
A
X
0
0
0
0
0
0
0
(Table
39.
D1
2
0
0
0
0
1
1
1
X
D1
X
1
0
0
1
1
0
0
1
12).
D1
X
0
0
1
0
1
0
1
1
1
A
0
D9
0
0
0
0
0
0
0
0
as defined in
Xenon_
VDD_F
28W_s
AIL_en
D8
0
0
0
s
1
0
PWM_en CLOCK_sel TEMP_en
BC1_s
ON_s
Table
D7
0
0
0
0
0
12.
unlimited_s
PWM6_s
Retry_
BC0_s
D6
0
0
1
0
Retry_dis_s OS_dis_s OLON_dis_s OLOFF_dis_
DIR_dis_s
SI Data
PWM5_s
OC1_s
current protection profile: the over-current thresholds are
divided by 2 and, the inrush and cooling responses are
dedicated to 28 W lamp.
corresponding output switch and a logic [0] turns it OFF (if IN
input is also pulled down). Bits D6:D0 set the output PWM
duty-cycle to one of 128 levels for PWM_en is set to logic [1],
as shown
ADDRESS A
REGISTER (CONFR0_S )
corresponding output switching through the SPI. Each output
“s” is independently selected for configuration based on the
state of the D14 : D13 bits
Table 12. Output Selection
D5
0
0
0
A logic [1] on bit D8 (28W_s) selects the 28 W over-
Bit D7 sets the output state. A logic [1] enables the
The CONFR0_s register allows the MCU to configure
A
1
CSNS_en
PWM4_s
OC0_s
(D14)
SR1_s
SOA4
0
0
1
1
Table
D4
1
0
1
A
7, page 29.
0
PWM3_s
010— OUTPUT CONFIGURATION
OCHI_s
CSNS1
SR0_s
SOA3
D3
1
0
Analog Integrated Circuit Device Data
(Table
A
0
DELAY2_s
(D13)
OCLO1_s
0
1
0
1
PWM2_s
CSNS0
SOA2
D2
0
0
s
12).
Freescale Semiconductor
OLLED_en
DELAY1_s DELAY0_s
OCLO0_s OC_mode_
PWM1_s
SOA1
D1
_s
X
1
0
HS Selection
HS0 (default)
HS1
HS2
HS3
CSNS_ratio
PWM0_s
OV_dis
SOA0
D0
_s
s
1
0