MC35XS3400CPNA Freescale, MC35XS3400CPNA Datasheet

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... V DD MCU GND Figure 1. 35XS3400 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2008 - 2011. All rights reserved. MOSFETs (quad DS(ON) MC35XS3400CPNA MC35XS3400DPNA PWR DD 35XS3400 ...

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... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics. ...

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... DWN PWM Module Calibratable Oscillator V REG Programmable FSI Watchdog Over-temperature Prewarning Figure 2. 35XS3400 Simplified Internal Block Diagram Analog Integrated Circuit Device Data Freescale Semiconductor INTERNAL BLOCK DIAGRAM Internal Over/Under-voltage POR Regulator Protections V REG Selectable Over-current Detection Severe Short-circuit Logic Detection Over-temperature ...

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... SPI communication. This pin is a command data input pin connected to the SPI serial data output Serial Input of the MCU or to the SO pin of the previous device of a daisy FSI 23 GND 22 HS2 21 HS0 Definition - chain of devices. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... NC N/A 24 FSI Input Analog Integrated Circuit Device Data Freescale Semiconductor Formal Name This pin is an external voltage input pin used to supply power interfaces to the SPI bus. These pins, internally shorted, are the ground for the logic and analog circuitry Ground of the device. These ground pins must be also shorted in the board. ...

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... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics. ...

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... This applies to all internal device logic that is PWR supplied by V and assumes that the external V PWR Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 3.0 V ≤ V ≤ 5 40°C ≤ T PWR DD Symbol ...

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... PWR Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Output OFF Open-load Detection Current is the current required to flow through the load for the purpose of detecting the existence of an open-load condition when the specific output is commanded OFF. Pull-up current is measured for V Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 3.0 V ≤ V ≤ 5 40°C ≤ T ...

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... V μA 5.0 – 20 μA 5.0 – 20 – – 125 250 500 kΩ – 4 2.0 – - 0.3 V -0.4 V – – – – 0.4 μA - 2.0 0 2.0 kΩ – 0 1.0 10 Infinite – RST ~ 3.0 V. REG Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Turn-ON delay time measured from rising edge of any signal (IN and = 5.0 Ω resistive load 28. Turn-OFF delay time measured from falling edge of any signal (IN and = 5.0 Ω resistive load. with R L Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 3.0 V ≤ V ≤ 5 40°C ≤ T PWR DD Symbol (26) SR R_00 (26) ...

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... CNSVAL t WDTO pin. FS ≤ 125°C, GND = 0 V, unless A = 25°C under nominal conditions, unless A Min Typ Max Unit μ 5.0 10 μ 7.0 20 μs – 70 100 217 310 400 128 - ms IN0 pin to HS voltage = FS Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Characteristic Output Over-current Time Step OC[1:0]=00 (slow by default) OC[1:0]=01 (fast) OC[1:0]=10 (medium) OC[1:0]=11 (very slow) Analog Integrated Circuit Device Data Freescale Semiconductor DYNAMIC ELECTRICAL CHARACTERISTICS ≤ 3.0 V ≤ V ≤ 5 40°C ≤ T PWR DD = 25°C under nominal conditions, unless A ...

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... Hz μ μs 140 200 260 10 – 5.0 – 6.0 – 175 250 325 ms 105 150 195 ms Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Time required for output status data to be available for use at SO. 1.0 kΩ on pull-up on 41. Time required for output status data to be terminated at SO. 1.0 kΩ on pull-up on Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 3.0 V ≤ V ≤ 5 40°C ≤ T PWR ...

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... OC1 35XS3400 16 TIMING DIAGRAMS DLY(ON) DLY(OFF Figure 4. Output Slew Rate and Time Delays t t OC3 t t OC5 OC6 OC4 t OC2 Figure 5. Over-current Shutdown Protection Time Time R PWM 50%V PWR Time SR F Time Time t OC7 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... V 0.2 VDD TwRSTB t ENBL t W RST TENBL CS CSB 10% V 0.7VDD DD 90% V 0.7VDD SCLK SCLK 10% V 0.2VDD SI Don’t Care SI Figure 7. Input Timing Switching Characteristics Analog Integrated Circuit Device Data Freescale Semiconductor Figure 6. Bulb Cooling Management DD t RSI t TwSCLKh TrSI WSCLKh ...

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... Figure 8. SCLK Waveform and Valid SO Data Delay Time 35XS3400 RSI FSI TrSI TfSI DD 50% t SO(EN) TdlyLH 90% V 0.7 VDD DD DD TrSO t RSO T t VALID VALID TfSO t FSO DD 0.2VDD 10 TdlyHL t SO(DIS) VOH V OH 1.0V 10 VOL V OL VOH V OH VOL VOH OH VOL V OL Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... The CS pin enables communication with the master microcontroller (MCU). When this pin logic [0] state, Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION INTRODUCTION Additionally, each output has its own parallel input or SPI control for pulse-width modulation (PWM) control if desired. The 35XS3400 allows the user to program via the SPI the fault current trip levels and duration of acceptable lamp inrush ...

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... In Normal mode, each bulb is controlled directly from the MCU through SPI. A pulse width modulation control module allows improvement of lamp lifetime with bulb power Table 23, ). This enables the REG failure detection is DD are self-protected and DS(ON) Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... The reported fault conditions are: open load, short-circuit to battery, short-circuit to ground (over-current Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION and severe short-circuit), thermal shutdown, and under/over- voltage ...

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... D0) protocol, with both input and output words transferring the most significant bit (MSB) first. All inputs are compatible with 5 3.3 V CMOS logic levels. CS D11 D10 OD11 OD10 OD9 OD8 OD7 OD6 OD5 OD4 OD3 OD2 OD1 OD0 device. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... SLEEP MODE The 35XS3400 is in Sleep mode when: • V and V are within the normal voltage range, PWR DD • wake- • fail = X, • fault = X. Analog Integrated Circuit Device Data Freescale Semiconductor OPERATIONAL MODES summarize details Table 6. 35XS3400 Operating Modes Mode wake-up Sleep 0 Normal 1 t ...

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... PWM(0) pin after the SPI word pin transitions from logic [1] SI command CALR ignored Internal clock duration pulse is outside a predefined time the calibration event will CSB(MIN) CSB(MAX this was not calibrated before. PWM(0) Analog Integrated Circuit Device Data Freescale Semiconductor ). In ...

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... Moreover, the device can be brought out of the Fail-safe mode due to watchdog timeout issue by forcing the FSI pin to logic [0]. Analog Integrated Circuit Device Data Freescale Semiconductor Transition Normal to Fail-safe Mode To leave the Normal mode, a fail-safe condition must occurred (fail=1). The previous latched faults are reset by the transition into Fail-safe mode (autoretry included) ...

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... OFF, and then ON (toggling fault_control signal of corresponding output SUPPLY(POR The SPI fault report (SC[0:3] bits) is removed after a read operation. Analog Integrated Circuit Device Data Freescale Semiconductor condition if Figure 6. The , the device R SHORT condition, if ...

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... V ), the outputs will turn off, PWR PWR(UV) Analog Integrated Circuit Device Data Freescale Semiconductor FS will go to logic [0], and the fault register UV bit will be set to [1]. Two cases need to be considered when the battery level recovers (V PWR •If the output command is OFF, FS will go to logic [1], but < ...

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... V and OSD(THRES) The OFF output open-load protection can be disabled through SPI (OLOFF_DIS[0:3] bit). (OpenloadOFF=1 or ShortVpwr=1 or OV=1) Latched OFF (SC=1) (OpenloadON=1) (OV=1) Autoretry ON if hson=1 pulled up with V OLD(THRES) ) and reported as a fault I OLD(OFF) Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... It is recommended to implement a voltage transient suppressor to drain the battery line energy. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSTIC FEATURES REVERSE BATTERY ON VPWR The output survives the application of reverse voltage as low as -18 V ...

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... FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS EMC PERFORMANCES All following tests are performed on Freescale evaluation board in accordance with the typical application schematic. SERIAL INPUT COMMUNICATION SPI communication is accomplished using 16-bit messages. A message is transmitted by the MCU starting with the MSB D15 and ending with the LSB, D0 ...

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... Table 11. Serial Input Address and Configuration Bit Map x = Don’t care Output selection with the bits defined Analog Integrated Circuit Device Data Freescale Semiconductor Table 12. FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS 35XS3400 31 ...

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... SR0_s (D3) Slew Rate Speed 0 medium (default) 1 low 0 high 1 Not used Table 8, page 24 (only available for 011 — OUTPUT CONFIGURATION 0 (Table 12). (Table 14). (Table 14). 0 enable with bulb threshold (default) 1 enable with LED threshold X disable (Table 15). Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Profile Curves Speed Table 17. Inrush Curve Selection OC1_s (D5) OC0_s (D4 logic [1] on bit D3 (OCHI_s bit) the OCHI1 level is replaced by OCHI2 during shown OC1 Analog Integrated Circuit Device Data Freescale Semiconductor I OCH 1 I OCH2 I OC1 I OC2 I CRS1 OC3 I OC4 I OCLO4 I OCLO3 I OCLO2 I OCLO1 t OC1 ...

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... Bit OD9 is set to logic [1] in Normal mode (NM). • The contents of bits OD8 : OD0 depend on bits from the most recent STATR command SOA4 : SOA0 as explained in the paragraphs following pin first transitioned Table 23, summarizes SO returned data for bits Table Analog Integrated Circuit Device Data Freescale Semiconductor 23. ...

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... SOA4:SOA3 = A A (Table 23 • OC_s: over-current fault detection for a selected output, • SC_s: severe short-circuit fault detection for a selected output, Analog Integrated Circuit Device Data Freescale Semiconductor SO Returned Data OD8 OD7 OD6 OD5 SOA ...

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... Open-load in ON and OFF state and HS shorted to VPWR detections are available, • No current recopy and no analog temperature feedback active, • Over-voltage protection is enabled, • SO reporting fault status from HS0, • VDD failure detection is disabled. Table 24. disabled enabled Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... SCLK 10k CS 10k I/O 10k SO SI A/D 10k 22nF VPWR Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS implemented to substitute light control (from MCU to watchdog) in case of a Fail-safe condition recommended to locate decoupling capacitor to the module connector 10µ PWR ignition ...

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... The DPNA code was qualified in accordance with JEDEC standards J-STD-020C Pb-free reflow profile. The maximum peak temperature during the soldering process should not exceed 260 for 40 seconds maximum duration. The AN2469 provides guidelines for Printed Circuit Board design and assembly. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... For the most current package revision, visit www.freescale.com and perform a keyword search using the 98ARL10596D listed below. Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS PNA SUFFIX 24-PIN PQFN NONLEADED PACKAGE 98ARL10596D ISSUE D PACKAGING PACKAGE DIMENSIONS 35XS3400 39 ...

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... PACKAGING PACKAGE DIMENSIONS 35XS3400 40 PNA SUFFIX 24-PIN PQFN NONLEADED PACKAGE 98ARL10596D ISSUE D Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Analog Integrated Circuit Device Data Freescale Semiconductor PNA SUFFIX 24-PIN PQFN NONLEADED PACKAGE 98ARL10596D ISSUE D PACKAGING PACKAGE DIMENSIONS 35XS3400 41 ...

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... PACKAGING PACKAGE DIMENSIONS 35XS3400 42 PNA SUFFIX 24-PIN PQFN NONLEADED PACKAGE 98ARL10596D ISSUE D Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Single layer thermal test board per JEDEC JESD51-3 and JESD51-5. 5. Thermal resistance between the die junction and the exposed pad, “infinite” heat sink attached to exposed pad. Analog Integrated Circuit Device Data Freescale Semiconductor and P . This results in two junction 2 . θJAmn . 1 ...

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... Pitch 12.0mm x 12.0mm Body 35XS3400 44 Figure 16. 2s2p JEDEC Thermal Test Board (Red - Top Layer, Yellow - Two Buried Layers GND 17 14 GND HS3 18 15 VPWR 19 20 HS1 NC Figure 17. Pin Connections 76.2mm FSI 23 GND 22 HS2 21 HS0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Figure 18. Steady State Thermal Resistance in Dependence on Heat Spreading Area; 1s JEDEC Thermal Test Board with Spreading Areas Analog Integrated Circuit Device Data Freescale Semiconductor Table 26. Thermal Resistance Performance Thermal Resistance R θ the thermal resistance between die junction and θ ...

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... JEDEC Standard Thermal Test Board with Heat Spreading Areas 600 Sq. mm 100 10 1 0.1 0.000001 Figure 20. Transient Thermal 1W Step Response; Device on 2s2p JEDEC Standard Thermal Test Board 35XS3400 46 0.0001 0.01 1 Time[s] RJA11 RJA12 RJA22 0.0001 0.01 1 Time [s] RJA11 RJA12 RJA22 100 10000 100 10000 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Previous Address SOA4 : SOA0 = 10111 (diagr2) on page 100) for protected.. Analog Integrated Circuit Device Data Freescale Semiconductor REVISION HISTORY Description: (DIAGR2 register): OD1=X (instead of 0) and OD0=X 36: bits OD2:OD0 are set to 1XX (instead of REVISION HISTORY 35XS3400 47 ...

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