ISP1581BD STEricsson, ISP1581BD Datasheet - Page 61

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ISP1581BD

Manufacturer Part Number
ISP1581BD
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1581BD

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Philips Semiconductors
Table 77:
V
9397 750 13462
Product data
Symbol
T
t
t
t
t
t
su1(min)
w1(min)
w2(min)
su2(min)
h2(min)
Fig 20. PIO mode timing.
CC
cy1(min)
= 4.0 to 5.5 V; V
(1) The device address consists of signals CS1, CS0, DA2, DA1 and DA0.
(2) The data bus width depends on the PIO access command used. Task File register access uses 8 bits (DATA[7:0]), except
(3) The device can negate IORDY to extend the PIO cycle with wait states. The host determines whether or not to extend the
(4) DIOR and DIOW have a programmable polarity: shown here as active LOW signals.
(write) DATA [ 7:0 ]
(read) DATA [ 7:0 ]
for Task File register 1F0 which uses 16 bits (DATA[15:0]). DMA commands 04H and 05H also use a 16-bit data bus.
current cycle after t
a). Device keeps IORDY released (high-impedance): no wait state is generated.
b). Device negates IORDY during t
c). Device negates IORDY during t
generated. The cycle is completed as soon as IORDY is re-asserted. For extended read cycles (DIOR asserted), the read
data on lines DATAn must be valid at t
DIOR, DIOW
Parameter
read/write cycle time (minimum)
address to DIOR/DIOW on set-up time
(minimum)
DIOR/DIOW pulse width (minimum)
DIOR/DIOW recovery time (minimum)
data set-up time before DIOW off
(minimum)
data hold time after DIOW off (minimum)
PIO mode timing parameters
IORDY
IORDY
IORDY
address
device
valid
(3a)
(3b)
(3c)
14.2.1 PIO mode
(1)
(4)
(2)
(2)
GND
14.2 DMA timing
= 0 V; T
su4
HIGH
following the assertion of DIOR or DIOW. The following three cases are distinguished:
amb
t su1
= 40 to 85 C.
su4
su4
, but re-asserts IORDY before t
and keeps IORDY negated for at least 5 ns after t
d1
before IORDY is asserted.
Rev. 06 — 23 December 2004
t su4
t su4
[1]
[1]
[1]
T cy1
Mode 0
600
70
165
-
60
30
t w1
su4
Mode 1
383
50
125
-
45
20
expires: no wait state is generated.
t w3
Hi-Speed USB peripheral controller
Mode 2
240
30
100
-
30
15
t su5
t su2
t su3
su4
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
expires: a wait state is
Mode 3
180
30
80
70
30
10
t h3
t h2
(min)
t h1
t d2
t w2
ISP1581
Mode 4
120
25
70
25
20
10
MGT499
60 of 79
Unit
ns
ns
ns
ns
ns
ns

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