FDC37C669-MT Standard Microsystems (SMSC), FDC37C669-MT Datasheet - Page 103
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FDC37C669-MT
Manufacturer Part Number
FDC37C669-MT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37C669-MT.pdf
(162 pages)
Specifications of FDC37C669-MT
Package Type
TQFP
Pin Count
100
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FDC37C669-MT
Manufacturer:
Microchip Technology
Quantity:
10 000
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OPERATION
Mode Switching/Software Control
Software will execute P1284 negotiation and all operation
prior to a data transfer phase under programmed I/O
control (mode 000 or 001). Hardware provides an
automatic control line handshake, moving data between
the FIFO and the ECP port only in the data transfer
phase (modes 011 or 010).
Setting the mode to 011 or 010 will cause the hardware to
initiate data transfer.
If the port is in mode 000 or 001 it may switch to any
other mode. If the port is not in mode 000 or 001 it can
only be switched into mode 000 or 001. The direction can
only be changed in mode 001.
Once in an extended forward mode the software should
wait for the FIFO to be empty before switching back to
mode 000 or 001. In this case all control signals will be
deasserted before the mode switch. In an ecp reverse
mode the software waits for all the data to be read from
the FIFO before changing back to mode 000 or 001.
Since the automatic hardware ecp reverse handshake
only cares about the state of the FIFO it may have
acquired extra data which will be discarded. It may in fact
be in the middle of a transfer when the mode is changed
back to 000 or 001. In this case the port will deassert
nAutoFd independent of the state of the transfer. The
design shall not cause glitches on the handshake signals
if the software meets the constraints above.
ECP Operation
Prior to ECP operation the Host must negotiate on the
parallel port to determine if the peripheral supports the
ECP protocol. This is a somewhat complex negotiation
carried out under program control in mode 000.
After negotiation, it is necessary to initialize some of the
port bits. The following are required:
•
•
Set Direction = 0, enabling the drivers.
Set strobe = 0, causing the nStrobe signal to default
to the deasserted state.
103
•
ECP address/RLE bytes or data bytes may be sent
automatically by writing the ecpAFifo or ecpDFifo
respectively.
Note that all FIFO data transfers are byte wide and byte
aligned. Address/RLE transfers are byte-wide and only
allowed in the forward direction.
The host may switch directions by first switching to mode
= 001, negotiating for the forward or reverse channel,
setting direction to 1 or 0, then setting mode = 011.
When direction is 1 the hardware shall handshake for
each ECP read data byte and attempt to fill the FIFO.
Bytes may then be read from the ecpDFifo as long as it
is not empty .
ECP transfers may also be accomplished (albeit slowly)
by handshaking individual bytes under program control in
mode = 001, or 000.
Termination from ECP Mode
Termination from ECP Mode is similar to the termination
from Nibble/Byte Modes. The host is permitted to
terminate from ECP Mode only in specific well-defined
states. The termination can only be executed while the
bus is in the forward direction. To terminate while the
channel is in the reverse direction, it must first be
transitioned into the forward direction.
Set
default to the deasserted state.
Set mode = 011 (ECP Mode)
autoFd
= 0, causing the nAutoFd signal to
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