LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 127
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LPC47M192-NW
Manufacturer Part Number
LPC47M192-NW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LPC47M192-NW.pdf
(228 pages)
Specifications of LPC47M192-NW
Lead Free Status / RoHS Status
Compliant
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The game port register is defined below. It is a runtime register located at the address programmed into the base I/O
address (GAME_PORT) in Logical Device 9.
Note: Register 0x60 is the high byte; 0x61 is the low byte. For example, to set the primary base address to 1234h,
write 12h into 0x60, and 34h into 0x61.
When the activate bit in Logical Device 9 is cleared, it prevents the base I/O address for the game port from being
decoded.
SMSC DS – LPC47M192
JOYW
TIMA,B
OUTA,B
JOYR
t1
DATASHEET
Page 127
VREF
2
3
VREF
Rev. 03/30/05
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