TXN174310850F16 Intel, TXN174310850F16 Datasheet - Page 36

• Manufacturer Part Number: TXN174310850F16
• Manufacturer: Intel

Specifications of TXN174310850F16

• Optical Fiber Type: TX/RX
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Mounting: Screw
• Lead Free Status / RoHS Status: Compliant

Table 69.
Intel
Datasheet
36
®
TXN17431 (0850) 10.3 Gbps 850 nm Optical Transceiver Compliant with XENPAK MSA
These two flag values are fed directly to RX_ALARM and TX_ALARM, respectively. LASI
is asserted when either RX_ALARM or TX_ALARM is set and enabled.
The DOM register update rate can be set by register 1.A100.1:0 contents. Writing a
“00” to these bits initiates a single upload of DOM registers. The DOM registers
periodically update if these bits are set to any other state (see
DOM Update Rates (DID = 1, Address = A100h)
If a DOM update is requested while a Non Volatile Register (NVR) read or write is in
progress, the NVR transaction is allowed to complete and the DOM update begins.
While the DOM update is pending, the DOM command register (1.A100h) indicates a
transaction in progress. The same applies if an NVR transaction is requested while a
DOM update is in progress. While an NVR or DOM update is queued, the associated
command register is put in the command-in-progress state.
diagram.
Bits (1:0)
the Rx Flag bit (1.A070 AND 1.9006). The logic OR of any of the selected fault
conditions is then reflected by Tx flag.
00
01
10
11
Initiate a single update of MDIO DOM registers; default update interval
value
Periodic update of MDIO DOM registers every 60 seconds
Periodic update of MDIO DOM registers every 10 seconds
Periodic update of MDIO DOM registers every 1 second
Description
Intel
®
TXN17431 (0850) Optical Transceiver
Figure 2
Document Number: 306425-005
Table
69).
shows a state
2-Nov-2007