CY7C128A-25LMB Cypress Semiconductor Corp, CY7C128A-25LMB Datasheet - Page 3

• Manufacturer Part Number: CY7C128A-25LMB
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C128A-25LMB

• Density: 16Kb
• Access Time (max): 25ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 11b
• Package Type: LLCC
• Operating Temp Range: -55C to 125C
• Number Of Ports: 1
• Supply Current: 125mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 24
• Word Size: 8b
• Number Of Words: 2K
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-05028 Rev. *A
Capacitance
AC Test Loads and Waveforms
Switching Characteristics
OUTPUT
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
4. Tested initially and after any design or process changes that may affect these parameters
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
6. t
7. At any given temperature and voltage condition, t
8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a
Parameter
I
write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
OL
HZOE
INCLUDING
/I
5V
OH
, t
Parameter
JIG AND
and 30-pF load capacitance.
HZCE
SCOPE
C
30 pF
C
OUT
, and t
IN
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE LOW to High Z
WE HIGH to Low Z
[4]
[8]
HZWE
R1 481Ω
(a)
are specified with C
R2
255 Ω
Description
Input Capacitance
Output Capacitance
[7]
OUTPUT
[6, 7]
[6]
[6]
Over the Operating Range
L
Description
= 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady state voltage.
INCLUDING
5V
JIG AND
HZCE
SCOPE
5 pF
is less than t
R1 481Ω
(b)
Min.
LZCE
15
15
12
12
12
10
5
3
5
0
0
0
0
5
T
V
for any given device.
A
-15
CC
R2
255 Ω
= 25°C, f = 1 MHz,
C128A–4
[2, 5]
= 5.0V
Max.
15
15
10
15
8
8
7
Test Conditions
Min.
20
20
15
15
15
10
5
5
0
0
0
3
0
5
-20
GND
3.0V
Equivalent to:
Max.
20
20
20
10
≤ 5 ns
8
8
7
10%
OUTPUT
Min.
35
25
25
25
20
15
5
3
5
0
0
0
0
5
ALL INPUT PULSES
-35
90%
THÉ VENIN EQUIVALENT
Max.
35
35
15
12
15
20
10
Max.
10
10
167Ω
Min.
45
40
30
30
20
15
5
3
5
0
0
0
0
5
CY7C128A
-45
90%
Max.
45
45
20
15
15
25
15
10%
Page 3 of 9
Unit
≤ 5 ns
1.73V
pF
pF
C128A–5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns