CY7C281A-30JXC Cypress Semiconductor Corp, CY7C281A-30JXC Datasheet

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CY7C281A-30JXC

Manufacturer Part Number
CY7C281A-30JXC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C281A-30JXC

Density
8Kb
Organization
1Kx8
Access Time (max)
30ns
Operating Current
100mA
Interface Type
Parallel
Package Type
PLCC
Operating Temperature Classification
Commercial
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Pin Count
28
Mounting
Surface Mount
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Compliant
Features
Functional Description
The CY7C281A is a high-performance 1024-word by 8-bit
CMOS PROMs. It is packaged in 300-mil and 600-mil-wide
Selection Guide
Cypress Semiconductor Corporation
Document #: 38-04003 Rev. *B
Maximum Access Time
Maximum Operating
Current
• CMOS for optimum speed/power
• High speed
• Low power
• EPROM technology 100% programmable
• Slim 300-mil or standard 600-mil DIP or 28-pin LCC
• 5V 10% V
• TTL-compatible I/O
• Direct replacement for bipolar PROMs
• Capable of withstanding >2001V static discharge
CS 1
CS 2
CS 3
CS 4
LogicBlockDiagram
A 9
A 8
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
— 25 ns (Commercial)
— 495 mW (Commercial)
DECODER
DECODER
COLUMN
ROW
CC
, commercial and military
PROGRAMMABLE
ARRAY
Commercial
MULTIPLEXER
3901 North First Street
7C281A-25
100
25
packages respectively. The CY7C281A is also available in a
28-pin leadless chip carrier. The memory cells utilize proven
EPROM floating-gate technology and byte-wide intelligent
programming algorithms.
The CY7C281A is a plug-in replacements for bipolar devices
and offer the advantages of lower power, superior perfor-
mance, and programming yield. The EPROM cell requires
only 12.5V for the super voltage, and low current requirements
allow for gang programming. The EPROM cells allow each
memory location to be tested 100% because each location is
written into, erased, and repeatedly exercised prior to encap-
sulation. Each PROM is also tested for AC performance to
guarantee that after customer programming, the product will
meet DC and AC specification limits.
Reading is accomplished by placing an active LOW signal on
CS
contents of the memory location addressed by the address
lines (A
(O
0
1
and CS
O
7
).
0
O 7
O 6
O 5
O 4
O 3
O 2
O 1
O 0
A
San Jose
9
2
) will become available on the output lines
, and active HIGH signals on CS
Pin Configurations
7C281A-30
100
30
GND
NC
O 0
A 4
A 3
A 2
A 1
A 0
CA 95134
O 0
O 1
O 2
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
5
6
7
8
9
10
11
Revised December 27, 2002
12
1
2
3
4
5
6
7
8
9
10
11
12
4
LCC/PLCC
1K x 8 PROM
Top View
7C281A
1314151617
Top View
3 2 1
DIP
7C281A
24
23
22
21
20
19
18
17
16
15
14
13
28
27
CY7C281A
18
A 8
A 9
CS 1
CS 2
CS 3
CS 4
26
V CC
O 7
O 6
O 5
O 4
O 3
3
Unit
25
24
23
22
21
20
19
408-943-2600
mA
ns
and CS
CS 1
CS 2
CS 3
CS 4
NC
O 7
O 6
4
. The

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CY7C281A-30JXC Summary of contents

Page 1

... The memory cells utilize proven EPROM floating-gate technology and byte-wide intelligent programming algorithms. The CY7C281A is a plug-in replacements for bipolar devices and offer the advantages of lower power, superior perfor- mance, and programming yield. The EPROM cell requires only 12 ...

Page 2

... Guaranteed Input Logical LOW Voltage for All Inputs GND < V < < OUT CC Output Disabled V = Max GND CC OUT V = Max., Commercial OUT Test Conditions MHz 5.0V CC CY7C281A Ambient Temperature + 10% 7C281A-25 7C281A-30 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2.0 2.0 0.8 0.8 10 +10 10 +10 10 + ...

Page 3

... Min. DESELECTED t HZCS programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. CY7C281A ALL INPUT PULSES 3.0V 90% 10% GND 5 ns 7C281A-25 7C281A-30 Max. ...

Page 4

... – – – – ILP A – IHP A – IHP A – ILP A – IHP 5%. DIP VFY PGM Figure 1. Programming Pinouts CY7C281A [5] Pin Function VFY IHP PP ILP ILP PP ILP IHP PP ILP IHP PP ILP ILP PP ILP PLCC Top View VFY 7 7C281A 22 PGM 1314151617 18 ...

Page 5

... OUTPUT VOLTAGE (V) I vs.CYCLE PERIOD CC 1.02 1.00 0.98 0.96 0.94 0.92 0.90 0.88 4 CYCLE PERIOD (ns) CY7C281A NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.2 1.0 0.8 0 0.4 125 4.0 4.5 5.0 SUPPLYVOLTAGE(V) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25 ...

Page 6

... Document #: 38-04003 Rev. *B Package Name Package Type J64 28-Lead Plastic Leaded Chip Carrier P13 24-Lead (300-Mil) Molded DIP J64 28-Lead Plastic Leaded Chip Carrier P13 24-Lead (300-Mil) Molded DIP 28-Lead Plastic Leaded Chip Carrier J64 CY7C281A Operating Range Commercial Commercial 51-85001-*A Page ...

Page 7

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 24-Lead (300-Mil) Molded DIP P13/P13A CY7C281A 51-85013-*A Page ...

Page 8

... Document History Page Document Title: CY7C281A PROM Document Number: 38-04003 REV. ECN NO. Issue Date ** 113859 03/06/02 *A 118902 10/09/02 *B 122244 12/27/02 Document #: 38-04003 Rev. *B Orig. of Change Description of Change DSG Change from Spec number: 38-00227 to 38-04003 GBI Update ordering information RBI Add power up requirements to Maximum ratings information ...

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