5962-8981503LA E2V, 5962-8981503LA Datasheet - Page 7

• Manufacturer Part Number: 5962-8981503LA
• Manufacturer: E2V

Specifications of 5962-8981503LA

• Lead Free Status / RoHS Status: Not Compliant

AC Test Loads
Waveforms
Operating Modes
The QP7C245A is a CMOS electrically programmable read only memory organized as 2048 words x 8
bits and is a pin-for-pin replacement for bipolar TTL fusible link PROMs. The QP7C245A incorporates a
D-type, master-slave register on chip, reducing the cost and size of pipelined microprogrammed
systems and applications where accessed PROM data is stored temporarily in a register. Additional
flexibility is provided with a programmable synchronous (E
and asynchronous initialization (INIT
Upon power-up the state of the outputs will depend on the programmed state of the enable function
(E
condition causing the outputs (O0–O7) to be in the OFF or high-impedance state. If the asynchronous
enable (E
enable (E
inputs (A0–A10) and a logic LOW to the enable input. The stored data is accessed and loaded into the
master flip-flops of the data register during the address set-up time. At the next LOW-to-HIGH
transition of the clock (CP), data is transferred to the slave flip-flops, which drive the output buffers,
and the accessed data will appear at the outputs (O0–O7).
bar
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S or E
bar
bar
bar
) is being used, the outputs will come up in the OFF or high-impedance state only if the
) input is at a HIGH logic level. Data is read by applying the memory location to the address
). If the synchronous enable (E
bar
).
bar
S) has been programmed, the register will be in the set
bar
S) or asynchronous (E
bar
) output enable
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QP7C245A