STK11C88-3P45I Cypress Semiconductor Corp, STK11C88-3P45I Datasheet - Page 8

• Manufacturer Part Number: STK11C88-3P45I
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK11C88-3P45I

• Word Size: 8b
• Organization: 32Kx8
• Density: 256Kb
• Interface Type: Parallel
• Access Time (max): 45ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: PDIP
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: -40C to 85C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 44mA
• Lead Free Status / RoHS Status: Not Compliant

STK11C88-3
March 2006
Internally,
the
tile information is transferred into the
After the t
be ready for
RECALL
Nonvolatile Elements. The nonvolatile data can be
recalled an unlimited number of times.
POWER-UP RECALL
During power up, or after any low-power condition
(V
latched. When V
voltage of V
be initiated and will take t
If the STK11C88-3 is in a
power-up
To help avoid this situation, a 10K Ohm resistor
should be connected either between W and system
V
CC
CC
SRAM
or between E and system V
< V
50
40
30
20
10
0
RESET
operation in no way alters the data in the
RECALL
RECALL
data is cleared, and second, the nonvola-
RECALL
SWITCH
Figure 2: I
), an internal
READ
cycle time the
, a
CC
50
, the
is a two-step procedure. First,
once again exceeds the sense
RECALL
and
CC
Cycle Time (ns)
SRAM
100
RESTORE
WRITE
(max) Reads
WRITE
RECALL
cycle will automatically
data will be corrupted.
SRAM
150
CC
to complete.
state at the end of
.
TTL
CMOS
operations. The
will once again
request will be
200
SRAM
cells.
8
HARDWARE PROTECT
The
against inadvertent
voltage conditions. When V
STORE
LOW AVERAGE ACTIVE POWER
The STK11C88-3 draws significantly less current
when it is cycled at times longer than 55ns. Figure 2
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
chip enable). Figure 3 shows the same relationship
for
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK11C88-3 depends on the following
items: 1)
cycle of chip enable; 3) the overall cycle rate for
accesses; 4) the ratio of
operating temperature; 6) the V
loading.
WRITE
Document Control # ML0013 rev 0.2
CMOS
STK11C88-3
operations are inhibited.
40
30
20
10
50
0
CMOS
cycles.If the chip enable duty cycle is less
and
Figure 3: I
TTL
vs.
50
CC
STORE
TTL
input levels (commercial tem-
offers
= 3.6V, 100% duty cycle on
Cycle Time (ns)
CC
100
input levels; 2) the duty
READ
(max) Writes
CC
operation during low-
hardware
< V
s to
150
CC
CC
TTL
SWITCH
CMOS
level; and 7) I/O
and
WRITE
200
, all software
READ
protection
s; 5) the
cycle