STK10C68K55M Cypress Semiconductor Corp, STK10C68K55M Datasheet - Page 2

• Manufacturer Part Number: STK10C68K55M
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK10C68K55M

• Word Size: 8b
• Organization: 8Kx8
• Density: 64Kb
• Interface Type: Parallel
• Access Time (max): 55ns
• Operating Supply Voltage (typ): 5V
• Package Type: CDIP
• Operating Temperature Classification: Military
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: -55C to 125C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 55mA
• Lead Free Status / RoHS Status: Not Compliant

March 2006
STK10C68
ABSOLUTE MAXIMUM RATINGS
Voltage on Input Relative to Ground . . . . . . . . . . . . . .–0.5V to 7.0V
Voltage on Input Relative to V
Voltage on DQ
Temperature under Bias . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . . 15mA
DC CHARACTERISTICS
Note b: I
Note c: I
Note d: E ≥ V
AC TEST CONDITIONS
CAPACITANCE
Note e: These parameters are guaranteed but not tested.
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V
Input Rise and Fall Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
SYMBOL
SYMBOL
I
I
I
I
I
I
I
V
V
V
V
T
C
C
CC 1
CC 2
CC 3
SB 1
SB 2
ILK
OLK
A
IH
IL
OH
OL
IN
OUT
d
d
b
c
b
CC 1
CC 2
Note a: Output Logic “1” Voltage
and I
is the average current required for the duration of the
Average V
Average V
Average V
5V, 25°C, Typical
Average V
(Standby, Cycling TTL Input Levels)
V
(Standby, Stable CMOS Input Levels)
Input Leakage Current
Off-State Output Leakage Current
Input Logic “1” Voltage
Input Logic “0” Voltage
Output Logic “0” Voltage
Operating Temperature
IH
0-7
CC
Input Capacitance
Output Capacitance
will not produce standby current levels until any nonvolatile cycle in progress has timed out.
. . . . . . . . . . . . . . . . . . . . . . –0.5V to (V
PARAMETER
Standby Current
CC 3
are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
CC
CC
CC
CC
PARAMETER
e
Current
Current during STORE
Current at t
Current
SS
. . . . . . . . . . –0.6V to (V
(T
AVAV
A
MAX
= 25
8
7
= 200ns
UNITS
°
C, f = 1.0MHz)
pF
pF
V
SS
MIN
COMMERCIAL
2.2
2.4
a
ΔV = 0 to 3V
ΔV = 0 to 3V
CONDITIONS
0
CC
– .5
CC
+ 0.5V)
+ 0.5V)
V
STORE
CC
MAX
N/A
N/A
750
0.8
0.4
85
75
65
10
27
23
20
±1
±5
70
3
+ .5
2
cycle (t
Note a: Stresses greater than those listed under “Absolute Maximum
V
–40/-55
SS
MIN
2.2
2.4
INDUSTRIAL/
MILITARY
– .5
STORE
Document Control # ML0006 rev 0.2
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at condi-
tions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
OUTPUT
V
85/125
CC
MAX
1500
) .
0.8
0.4
90
75
65
55
10
28
24
21
20
±1
±5
3
+ .5
UNITS
Figure 1: AC Output Loading
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
°C
V
V
V
V
255 Ohms
t
t
t
t
All Inputs Don’t Care, V
W ≥ (V
All Others Cycling, CMOS Levels
t
t
t
t
E ≥ (V
All Others V
V
V
V
V
All Inputs
All Inputs
I
I
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
OUT
OUT
CC
IN
CC
IN
= V
= V
= max
= max
= – 4mA
= 8mA
= 25ns
= 45ns
= 55ns
= 35ns, E ≥ V
= 45ns, E ≥ V
= 55ns, E ≥ V
= 35ns
= 25ns, E ≥ V
CC
CC
SS
SS
(V
– 0.2V)
– 0.2V)
to V
to V
CC
IN
≤ 0.2V or ≥ (V
CC
CC
NOTES
, E or G ≥ V
= 5.0V
5.0V
IH
IH
IH
IH
480 Ohms
CC
30 pF
INCLUDING
SCOPE AND
FIXTURE
= max
CC
IH
±
– 0.2V)
10%)