M470T2864DZ3CE6 Samsung Semiconductor, M470T2864DZ3CE6 Datasheet
M470T2864DZ3CE6
Specifications of M470T2864DZ3CE6
Related parts for M470T2864DZ3CE6
M470T2864DZ3CE6 Summary of contents
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SODIMM DDR2 Unbuffered SODIMM 200pin Unbuffered SODIMM based on 1Gb D-die INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, ...
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... Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin 13.3 Timing parameters by speed grade (DDR2-800 and DDR2-667) 13.4 Timing parameters by speed grade (DDR2-533 and DDR2-400) 14.0 Physical Dimensions : .............................................................................................................18 14.1 64Mbx16 based 128Mx64 Module(2 Ranks) 14.2 64Mbx16 based 64Mx64 Module(1 Rank) ...........................................................................................7 .........................................................................................8 .......................................................................9 .................................................................................................10 ...
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SODIMM Revision History Revision Month Year 1.0 March 2007 - Initial Release 1.1 April 2007 - Corrected Typo 1.2 July 2008 - Applied JEDEC update(JESD79-2E timing table History DDR2 SDRAM Rev. 1.2 July 2008 ...
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... Package: 84ball FBGA - 64Mx16 • All of base components are Lead-Free and RoHS compliant Note : For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram. 3.0 Address Configuration Organization 64Mx16(1Gb) based Module Density Organization Component Composition 1GB 128Mx64 ...
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... DQS2 Note : Connect; NC, TEST(pin 163)is for bus analysis tool and is not connected on normal memory modules. 5.0 Pin Description Pin Name Description CK0,CK1 Clock Inputs, positive line CK0,CK1 Clock Inputs, negative line CKE0,CKE1 Clock Enables RAS Row Address Strobe CAS Column Address Strobe ...
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... DDR2 SDRAMs and is sent at the leading edge of the data window. DQS signals are com- plements, and timing is relative to the crosspoint of respective DQS and DQS If the module oper- ated in single ended strobe mode, all DQS signals must be tied on the system board to V SDRAM mode registers programmed appropriately ...
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... SODIMM 7.0 Functional Block Diagram : 7.1 1GB, 128Mx64 Module - M470T2864DZ3 (Populated as 2 rank of x16 DDR2 SDRAMs) 3Ω ODT1 ODT0 CKE1 CKE0 S1 S0 DQS0 CS LDQS DQS0 LDQS LDM DM0 DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 ...
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... SODIMM 7.2 512MB, 64Mx64 Module - M470T6464DZ3 (Populated as 1 rank of x16 DDR2 SDRAMs) 3Ω CKE0 ODT0 S0 DQS0 DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1 DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2 DQS2 DM2 DQ16 ...
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SODIMM 8.0 Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL DDL Voltage on ...
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SODIMM 9.2 Operating Temperature Condition Symbol T Operating Temperature OPER Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...
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SODIMM 10.0 IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Operating one bank active-precharge current; IDD0 tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD); CKE is HIGH HIGH between ...
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... IDD3P-S 72 IDD3N 260 IDD4W 700 IDD4R 780 IDD5 620 IDD6 60 24 IDD7 1,120 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 800@CL=6 667@CL=5 LF7 CE6 LE6 600 560 640 600 120 64 120 64 320 ...
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SODIMM 12.0 Input/Output Capacitance Parameter Non-ECC Input capacitance, CK and CK Input capacitance, CKE , CS, Addr, RAS, CAS, WE Input/output capacitance, DQ, DM, DQS, DQS * DM is internally loaded to match DQ and DQS identically. 13.0 Electrical Characteristics ...
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SODIMM 13.3 Timing parameters by speed grade (DDR2-800 and DDR2-667) (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK Average clock HIGH pulse ...
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SODIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...
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SODIMM 13.4 Timing parameters by speed grade (DDR2-533 and DDR2-400) (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK CK HIGH pulse width ...
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SODIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...
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... SODIMM 14.0 Physical Dimensions : 14.1 64Mbx16 based 128Mx64 Module (2 Ranks) 1 ± 11.40 0.15 mm ± 16.25 0. FRONT SIDE ± 4.20 0.15 1.50 ± 0.10 2.70 ± 0.10 1.0 ± 0.05 4.00 ± 0.10 The used device is 64M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G164QD - M470T2864DZ3 ± ...
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... SODIMM 14.2 64Mbx16 based 64Mx64 Module (1 Rank) 1 ± 11.40 0.15 mm ± 16.25 0. FRONT SIDE ± 4.20 0.15 1.50 ± 0.10 2.70 ± 0.10 1.0 ± 0.05 4.00 ± 0.10 The used device is 64M x16 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T1G164QD - M470T6464DZ3 ± ...