MT36HTF51272PY-667G1 Micron Technology Inc, MT36HTF51272PY-667G1 Datasheet - Page 11

• Manufacturer Part Number: MT36HTF51272PY-667G1
• Manufacturer: Micron Technology Inc

Specifications of MT36HTF51272PY-667G1

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240RDIMM
• Device Core Size: 72b
• Organization: 512Mx72
• Total Density: 4GByte
• Chip Density: 1Gb
• Access Time (max): 45ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 2.556A
• Number Of Elements: 36
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / RoHS Status: Compliant

Register and PLL Specifications
Table 11:
PDF: 09005aef818e3fc8/Source: 09005aef818e3fdb
HTF36C256_512x72.fm - Rev. C 1/07 EN
DC high-level
input voltage
DC low-level
input voltage
AC high-level
input voltage
AC low-level
input voltage
Output high voltage
Output low voltage
Input current
Static standby
Static operating
Dynamic operating –
clock tree
Dynamic operating
(per each input)
Input capacitance
(per device, per pin)
Input capacitance
(per device, per pin)
Parameter
Register Specifications
SSTU32868 devices or equivalent JESD82-14 for the 4GB and SSTU32866 devices or equivalent JESD82-10 for
the 2GB
Notes:
Symbol
V
V
V
V
I
I
IH
IH
V
IL
IL
V
1. Timing and switching specifications for the register listed above are critical for proper oper-
I
I
DDD
DDD
DD
DD
C
OH
(
(
OL
I
(
(
I
DC
AC
DC
AC
I
ation of the DDR2 SDRAM registered DIMMs. These are meant to be a subset of the param-
eters for the specific device used on the module. Detailed information for this register is
available in JEDEC Standard JESD82.
)
)
)
)
except RESET#
Parity output
Parity output
command
command
command
command
All inputs
Address,
Address,
Address,
Address,
control,
control,
control,
control,
All pins
All pins
All pins
RESET#
Pins
N/A
N/A
2GB, 4GB (x72, ECC, DR) 240-Pin DDR2 SDRAM RDIMM
RESET# = V
RESET# = V
One data input switching at
V
V
switching 50% duty cycle;
switching 50% duty cycle
IL
IL
RESET# = V
t
V
(
(
CK/2, 50% duty cycle
AC
AC
V
I
V
V
= V
I
I
RESET# = V
I
), Io = 0; CK and CK#
), Io = 0; CK and CK#
= V
= V
= V
11
V
Condition
IH
DD
LVCMOS
LVCMOS
SSTL_18
SSTL_18
SSTL_18
SSTL_18
DD
DD
DD
REF
DD
(
Io = 0
AC
Q = 1.8V
, V
, V
Q or V
Q or V
SS
) or V
±250mV;
I
I
Q (Io = 0)
= V
= V
SS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Q;
IL
SS
IH
IH
SS
(
Q
(
(
Q
DC
AC
AC
)
) or
) or
Register and PLL Specifications
V
V
REF
REF
(
(
Min
DC
DC
1.2
2.5
–5
0
0
–
–
–
–
–
–
) + 250
) +125
©2005 Micron Technology, Inc. All rights reserved.
manufacturer
manufacturer
manufacturer
V
V
V
REF
REF
DD
Varies by
Varies by
Varies by
40mA
(
(
Max
Q + 250
V
DC
DC
100
0.5
3.5
DD
–
5
) - 125
) - 250
Units
mV
mV
mV
mV
mV
mV
µA
µA
µA
µA
µA
pF
pF