MT45W8MW16BGX-708LWT Micron Technology Inc, MT45W8MW16BGX-708LWT Datasheet - Page 58
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MT45W8MW16BGX-708LWT
Manufacturer Part Number
MT45W8MW16BGX-708LWT
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W8MW16BGX-708LWT.pdf
(68 pages)
Specifications of MT45W8MW16BGX-708LWT
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 46:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
DQ[15:0]
LB#/UB#
A[22:0]
IN/OUT
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IH
IL
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
High-Z
Burst WRITE Followed by Burst READ
t CSP
t SP
t SP
t SP
Address
Valid
Notes:
t HD
t HD
t HD
High-Z
1. Non-default BCR settings for burst WRITE followed by burst READ: Fixed or variable latency;
2. A refresh opportunity must be provided every
t CLK
latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
either of the following two conditions: a) clocked CE# HIGH, or b) CE# HIGH for longer than
15ns. CE# can stay LOW between burst READ and burst WRITE operations, but CE# must not
remain LOW longer than
pages 59 through 61) for cases where CE# stays LOW between bursts.
t SP
t SP t HD
D0
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
t HD
D1
D2
t
D3
CEM. See burst interrupt diagrams (Figures 47 through 49, on
t HD
58
t CBPH
Note 2
t CSP
t SP
t SP t HD
t SP t HD
V
V
Address
Valid
OH
OL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t HD
Page/Burst CellularRAM 1.5 Memory
High-Z
t
CEM. A refresh opportunity is satisfied by
t ACLK
t BOE
Output
Valid
t KOH
Output
©2004 Micron Technology, Inc. All rights reserved.
Valid
Don’t Care
Output
Valid
Output
Valid
t OHZ
Undefined
High-Z
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